100 10L AD Search Results

ADEX-10L

Abstract: DC-800
Contextual Info: Surface Mount ADEX-10L+ ADEX-10L Frequency Mixer Level 4 LO Power +4 dBm 10 to 1000 MHz Maximum Ratings Operating Temperature Features -40°C to 85°C Storage Temperature -55°C to 100°C RF Power 50mW IF Current 40mA Permanent damage may occur if any of these limits are exceeded.

5252 f 1201

Abstract: 232-600
Contextual Info: Mini-Circuits - Specification for Frequency Mixer - ZX05-10L Frequency Mixers Notes: • Phase detection, positive polarity • Maximum Ratings: Operating Temperature: -55°C to 100°C Storage Temperature: -55°C to 100°C print this page LO Power Level 4 dBm

Contextual Info: MITSUBISHI LS Is SRAM MODULE STATIC RAM 1 M X 18 18M B IT Max. Type name Access Load memory time Outward dimensions Data sheet W x H x D (mm) page (ns) MH1M18AN-85L 85 MH1M18AN-10L 100 MH1M18AN-12L 120 MH1M18AN-15L 150 MH1M18AN-85H 85 MH1M18AN-10H 100 MH1M18AN-12H

k22s

Abstract: HP 1003 WA
Contextual Info: iw VITELIC V53C258A FAMILY HIGH PERFORMANCE, LOW POWER 2 5 6 K X 1 B IT STATIC COLUMN CMOS DYNAMIC RAM ‘ 60/60L HIGH PERFORMANCE V53C25SA 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 30 ns

SBTC-2-10L

Abstract: ed99 AT1029 SBTC-2-10
Contextual Info: Surface Mount Power Splitter/Combiners 2 Way-0° 50Ω SBTC-2-10L+ 5 to 1000 MHz Features Maximum Ratings Operating Temperature Storage Temperature Power Input as a splitter Internal Dissipation SBTC-2-10+ -40°C to 85°C -55°C to 100°C 0.5W max. 0.125W max.

V54C128

Contextual Info: gr VITELIC f V54C128 FAMILY HIGH PERFORMANCE, 128K x 8 BIT, PSEUDOSTA TIC, CMOS RAM ADVANCED 80/80L 10/10L 12/12L CE Access Time, tCEA 80 ns 100 ns 120 ns OE Access Time, (tQEA) 35 ns 40 ns 50 ns Min. Read-Write Cycle Time, (tRC) 130 ns 160 ns 190 ns HIGH PERFORMANCE V54C128

Contextual Info: M i i V VITELIC V53C400 HIGH PERFORMANCE, LOW POWER 4M X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, (tpc)

gl 9608

Contextual Info: ST 1 VITELIC V53C664 64K x 16 B IT FAST PAGE MODE BYTE WRITE CMOS DYNAMIC RAM * PRELIMINARY 80/80L 10/10L Max. RAS Access Time, tRAC 80 ns 100 ns Max. Column Address Access Time, (tCAA) 45 ns 55 ns Min. Fast Page Mode Cycle Time, (tp c ) 55 ns 65 ns Min. Read/Write Cycle Time, (tRC)

Contextual Info: Surface Mount Power Splitter/Combiners 2 Way-0° 50Ω Maximum Ratings Operating Temperature Storage Temperature Power Input as a splitter Internal Dissipation SBTC-2-10+ SBTC-2-10L+ 5 to 1000 MHz Features -40°C to 85°C -55°C to 100°C 0.5W max. 0.125W max.

Contextual Info: MITSUBISHI LS Is SRAM MODULE STATIC RAM i BIT 256KX8 2£mhA Max. Access Type name Load memory time Outward dimensions Data sheet W X H X D (m m ) page (ns) MH2568ABNA-85L ★★ 85 MH2568ABNA-10L ★★ 100 MH2568ABNA-12L ★★ 120 MH2568ABNA-15L ★★

MH1M08ATNA-12H

Contextual Info: MITSUBISHI LSIs SRAM MODULE STATIC RAM 1M 8 8 OM . B IT M ax. Type name Access Load m em ory tim e O u tw a rd d im e n sio n s WXHXD (m m ) Data sheet page (ns) MH1M08ATNA-85L 85 MH1M08ATNA-10L 100 MH1M08ATNA-12L . 120 MH1M08ATNA-15L

Contextual Info: if “ VITELIC V53C404 HIGH PERFORMANCE, LO W POWER 1 M X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 4 0 ns 50 ns Min. Fast Page Mode Cycle Time, (tpç)

Q001

Abstract: DHR48 V53C464
Contextual Info: bSE M O SEL-VITELIC T> m b 3 S 3 3 T l Ü G Q lflM b b T l V53C464A FAMILY HIGH PERFORMANCE; LOW POWER 64K X 4 BIT FAST PAGE MODE CMOS DYNAMIC RAM 60/60L 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA)

Contextual Info: An m im y V1TELIC V53C404 HIGH PERFORMANCE, LO W POWER 1 M X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 7 0 /7 0 L 8 0 /8 0 L 1 0 /10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, {tCAA) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, ( t ^ )

V53C466

Abstract: DQQ0400 vitelic V53C466 lawo M54510
Contextual Info: VITELIC VITELIC CORP ifl D ÌJ ^505310 DQQ0400 7 T-V6-Z3-/7 V 5 3C 4 66 FAMILY HIG H PERFORMANCE, LOW POWER 6 4 K X 4 B IT S TA TIC CO LUM N CMOS DYN A M IC RAM 70/70L 8 0 /8 0 L 10/10L Max. RAS Access Time, t ^ 70 ns 80 ns 100 ns 120 ns Max. Column Address Access Time, tCAA

YM 3533

Contextual Info: bEE D MOSEL-VITELIC MOSEL-VITELIC • b3533^1 Q0QS3MS 7Ô3 ■ M O V I V400J8/9 4M X 8, 4M X 9 B IT FA ST PAGE MODE CMOS DYNAMIC RAM M EM ORY MODULE HIGH PERFORMANCE, LO W POWER HIGH PERFORMANCE V400J8/9 PRELIMINARY 70/70L 80/80L 10/10L 70 ns 80 ns 100 ns

ic ac 1501-12

Abstract: V53C664K10
Contextual Info: JUN i V 2 1982 PR ELIM IN A R Y V53C664 6 4 K x 16 B IT F A S T P A G E M O D E B YTE W RITE C M OS D YN A M IC R AM VITELIC 80/80L 10/10L Max. RAS Access Time, tRAC 80 ns 100 ns Max. Column Address Access Time, (tCAA) 45 ns 55 ns Min. Fast Page Mode Cycle Time, (tp c )

M5M51008AFP

Contextual Info: MITSUBISHI LS Is SRAM MODULE STATIC RAM 1M X 9 î7 M 9 i B IT M ax. A ccess Type nam e tim e Load m e m o ry O u tw a rd d im e n s io n s W x H x D (m m ) D a ta sheet page (n s ) MH1M09AN-85L 85 MH1M09AN-10L 100 MH1M09AN-12L 120 MH1M09AN-15L 150 MH1M09AN-85H

TC55257BPI-10L

Contextual Info: 32,768 W O R D S x 8 B IT S T A T I C R A M PRELIMINARY D ESC RIPT IO N The TC55257BPI is 262,144 bit static ramdom access memory organized as 32,768 words by 8 bits using CMOS technology, and operated from a single 5V supply. Advanced circuit techniques provide

Contextual Info: • S iili* « 131,072 WORDS X 8 BIT STATIC RAM DESCRIPTION The T C 551001PL /FL is 1,048,576 bits static random access memory organized as 131,072 words by 8 bits using CMOS technology, and operated a single 5V power supply. Advanced circuit techniques provide both high speed and low power features w ith an operating cu rren t of 5mA/MHz Typ. and

tc55257bpi10l

Abstract: TC55257BFI-10L TC55257BFI10L TC55257BPI-10L TC55257BFI
Contextual Info: 32,768 WORDS x 8 BIT STATIC RAM PRELIMINARY DESCRIPTION The TC55257BPI is 262,144 bit static random access memory organized as 32,768 words by 8 bits using CMOS technology, and operated from a single 5V supply. Advanced circuit techniques provide both high speed and low power features with an operating current of 5mA/MHz Typ. and maximum

Contextual Info: 8,192 WORD X 8 BIT CMOS STATIC RAM ]d e s c r i p t i o n ! The TC5565APL/AFL is a 65,536 "bit static random access memory organized as 8,198 words by 8 bits u sin g CMOS technology, and operates from a single 5V supply. Advanced circuit techniques provide both high speed and low power features w ith a m axim um operating current of 5mA/MHz

tc8568

Abstract: TC5568APL tc856 2764D TC5565 TC5565AFL15L TC556 PL12L TMM2764D
Contextual Info: 8,192 WORD X 8 BIT CMOS STATIC RAM Id e s c r i p t i o n ! The TC5565APL/AFL is a 65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS technology, and operates from a single 5V supply. Advanced circuit techniques provide both high speed and low power features w ith a maximum operating current of 5mA/MHz

M5M51008BVP

Abstract: M5M51008BP MARK S2
Contextual Info: 1997-4/1 MITSUBISHI LSIs M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L, -55LL,-70LL,-10LL-I 1048576-BIT 131072-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) ADDRESS INPUTS FEATURES Power supply current Type name M5M51008BP,FP,VP,RV,KV,KR-55L