0X20101 Search Results

59013 h 331

Abstract: 59014 c 331 comcode 105 736 490 fcs 9013 GR-253-CORE JT-G704 JT-G706 TMXL28155 TR-62411 59014 c
Contextual Info: Preliminary Data Sheet, Rev 2 June, 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

8030D

Abstract: 5001c ic pin details M13RF LC1 D18 E23378 0x2000D 747 ic XC1so 816f capacitor 1e81
Contextual Info: Preliminary Data Sheet December 2001 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Preliminary Data Sheet, Rev 1 March 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

stm cl-30

Abstract: THSC2 LT 7659 psb 500-1.0 highway speed checker data sheet transistor 9012 SDH 209 ses 554 transistor fcs 9012 70010 FB
Contextual Info: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Lucent SLC 2000 channel shelf

Abstract: transistor fcs 9013 Lucent SLC 2000 installation sts 9013 DIGRAM FOR TEST IC 324 fcs 9013 fcs 9014 J-D4N SLC 500 ELECTRONIC CIRCUIT DIGRAM transistor fcs 9012
Contextual Info: Preliminary Data Sheet, Rev. 1 October 2000 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. STS/STM Pointer Interpreter

LDR bp2

Abstract: CT16M72S4D75 altera IC Date Code Formats
Contextual Info: Excalibur Solutions— Booting Excalibur Devices July 2002, ver. 1.1 Introduction Application Note 187 The Altera family of Excalibur embedded processor PLDs combines an unparalleled degree of integration and programmability on a single chip. The advantages of PLD flexibility, coupled with a high-performance

0x80060

Abstract: 0x10061
Contextual Info: Supermapper Family Register Description, Revision 3 July 7, 2006 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Register Description Overview 1.1 Introduction The Supermapper Family Register Description describes software register information for the following mapper system

10706H

Abstract: 20606H 20202H 27575 EPXA10 23131H 11413H 22626H 0x20101 12928H
Contextual Info: Excalibur Solutions— Using the Excalibur Stripe PLLs July 2002, ver. 1.3 Introduction Application Note 177 This application note describes the operational characteristics of the phase-locked loops PLLs that are located in the embedded stripe of Excalibur embedded processor PLDs, and presents various design

sdr sdram pcb layout guidelines

Abstract: sdr sdram pcb layout "sdr sdram" pcb layout sdram controller "sdr sdram" design guideline ldr resistor AN141 ARM922T EPXA10 excalibur Board
Contextual Info: Excalibur Solutions— Using the SDRAM Controller September 2002, ver. 1.0 Introduction Application Note 141 In modern embedded systems, synchronous dynamic RAM SDRAM provides an inexpensive way of incorporating large amounts of memory into a design. There are two functional types of SDRAM, single data rate

SSI 280

Abstract: d553 D553 transistor transistor equivalents for d553 M3A-HS30 0x0000FFFFu SH7263 SH7203
Contextual Info: APPLICATION NOTE SH7263/SH7203 Group SSI Master Transmitter Introduction This application note presents an example of data transfer by the serial sound interface SSI . Target Device SH7263/SH7203 Contents 1. Preface. 2

59013 f 331

Abstract: 59012 h 331 59013 h 331
Contextual Info: Preliminary Data Sheet 2/06/02 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

LT 7659

Abstract: w20338 comcode 105 736 490 JT-G706 TMXF28155 TR-62411 GR-253-CORE JT-G704 1 into 12 demultiplexer circuit diagram 80212 502
Contextual Info: Data Sheet June 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

G732

Abstract: 59013 h 331 59013 f 331 59012 h 331
Contextual Info: Preliminary Data Sheet, Revision 3 April 30, 2003 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

LT 7659

Abstract: lin bus example C codes HG123 TMXF281553BAL-2-DB SDH 209 GR-253-CORE JT-G704 JT-G706 TMXF28155 TR-62411
Contextual Info: Preliminary Data Sheet May 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

LT 7659

Abstract: Lucent SLC 2000 installation LTE DL Channel Encoder transistor fcs 9012 GR-253-CORE JT-G704 JT-G706 TMXF28155 TR-62411 21153 specification update
Contextual Info: Preliminary Data Sheet May 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

Contextual Info: Supermapper Family Register Description, Rev 1 July 19, 2004 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Register Description Overview 1.1 Introduction The Supermapper Family Register Description describes software register information for the following mapper system

Contextual Info: Preliminary Data Sheet March 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1+1, unprotected and ring (UPSR) network topologies.

RSY-5

Abstract: speex Vt-158 single slot
Contextual Info: Supermapper Family Register Description October 14, 2003 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH xDS3/DS2/DS1/E1/DS0 1 Register Description Overview 1.1 Introduction The Supermapper Family Register Description describes software register information for the following mapper system

transistor fcs 9012

Abstract: fcs 9012 fcs 9013 fcs 9014 transistor fcs 9013 4-bit even parity checker circuit diagram 9012 9013 frequency to voltage converters asp 962 data sheet transistor 9012 LT 7659
Contextual Info: Preliminary Data Sheet, Rev 1 March 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.