0137S Search Results

DM50P

Contextual Info: PRELIMINARY I^ IC R D N 1 MEG DRAM M ODULE MT4LD T 164(X) 64 DRAM MODULE X 1 M EG x 64 8 MEGABYTE, 3.3' 8 MEGABYTE’ a3V’ FASTPAGE0R EDO PAGE MODE FEATURES • JEDEC- and industry-standard pinout in a 168-pin, dual-in-line memory module (DIMM) • High-performance CMOS silicon-gate process

m43of

Abstract: TAA 761 siemens Package Outlines P-LCC DATE CODE 3535B aop 741 5MXE siemens lsl siemens 58 295 84 pin intel 80 B209 B-209
Contextual Info: SIEMENS ICs for Communications ISDN Echocancellation Circuit IEC-Q PEB 2091 Version 5.3 PEF 2091 Version 5.3 Data Sheet 01.99 DS 2 • flE3ShDS 013751t, b77 B PEB/F 2091 Revision History: Current Version: 01.99 Previous Version: None Page in previous Version

NEOSId 2.2k

Abstract: NEOSID 22k
Contextual Info: Page 1 FS: 04/93 SIEMENS AG IC-SPECIFICATION TDA 4362 X Differences to the last edition Last Edition: Page 11: Page 12: DOK-Nr. V66047-S1603-C200-G1 date: 11.12.97 #P7: Test values and units changed #P8: Test values and units changed #P11: Test values changed, wrong values in previous version

CSM 6850

Abstract: mg80960xa 80960XA BV EI 303 3628 80960CA 80960KA 80960KB 80960MC M8259A 77106
Contextual Info: 80960XA EMBEDDED 32-BIT MICROPROCESSOR WITH 33RD TAG BIT TO SUPPORT OBJECT-ORIENTED PROGRAMMING AND DATA SECURITY M ilita ry • Implements JIAWG 32-Bit ISA Standard ■ High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at

Contextual Info: LXT905 Universal Ethernet Interface A d a p te r Internal M A U with Integrated 1 0 B A S E -T M A U , E n D e c a n d Filters T he LX T905 U niversal E thernet Interface A dapter is de­ signed for IEE E 802.3 physical layer applications. It pro­ vides, in a single C M O S device, all the active circuitry for