000227B Search Results

Contextual Info: XL28C16A 2K X 8 CMOS Electrically Erasable PROM FEATURES PIN CONFIGURATION 24 Pin PDIP Type "P" Package • Fast Read Access Times — 100ns, 150ns, 200ns, 250ns ■ Low CMOS Power Consumption — 30mA active max. — 100jjA standby (max.) A7 Ae Ab A* a3

Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

Contextual Info: SARA Chipset Technical Manual Segmentation SARA Hardware Description Chapter 3. Hardware Description 3.1 Segmentation SARA Hardware Description 3.1.1 Segmentation SARA Internal Block Description Figure 3-1 shows a block diagram of the Segmentation SARA chip.

486 motherboard schematic

Abstract: 486dx2 pinouts 486DX2 486dx schematic 4021-A TL05A Super386 t187 T106B J7 CHIPS TECHNOLOGIES
Contextual Info: CHIPS & TECHNOLOGIES INC SIE D • SO Töllb DDOSSba 4ÖT M C H P 9000-380 8 CHIPS CHIPS & TECHNOLOGIES INC S1E » ■ EQTflllb □□□PPbM 31S MCHP T -v 1 -1 7 -0 1 Copyright Notice Software Copyright 1992, Chips and Technologies, Inc. Manual Copyright © 1992, Chips and Technologies, Inc.

4k51

Abstract: Flash SIMM 80 programmer
Contextual Info: ^ED I 2 ,4,8 EiCTDONIC DESIGN M egabyte FISSAI 512Kx32 Flash Module Features The EDI Flash Family is a five-volt-only in system Flash program­ 2,4,8 megabyte CMOS Flash Module Family Organization: mable and eraseable read only memory module. The modules are

AD7530

Abstract: AD7530JCWE AD7530JN AD7530KCWE AD7530KN AD7530LCWE AD7530LN AD7531 AD7531KQ T-5109
Contextual Info: 13E D HA HAXIM INTEGRATED PRODUCTS • Sê7bbSl 0ÜG2274 7 ■ CMOS 10 and 12 Bit M ultiplying D/A Converters General Description . The AD7530 and AD7531 are low cost CMOS m ultiply­ ing digitai-to-analog converters DAC with 10 ana 12 bit resolution respectively. Both DACs operate from a

synergy series

Abstract: H600 SY100H600 SY10H600 SY10H600JC 10Hxxx
Contextual Info: 6 Q V A 9 - B I SEMICONDUCTOR T TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES SY10H600 SY100H600 DESCRIPTION • 9-bit ideal for byte-parity applications The SY 10/100H 600 are 9-bit, dual supply T TL-to-E C L translators. D evices in the Synergy 9-bit tran sla to r series

R2501

Abstract: VE31 0002dB 450-0K1 450-10K0 r 2501
Contextual Info: S7E D • 373113G 0D02E71 3S1 « F R E FREQUEIICV 450 SERIES: SINGLE PHASE, DEVICES ' FIXED FREQUENCY SINEWAVE OSCILLATORS 215 FREQUENCY DEVICES INC <T - S 0 * 5 ' FEATURES • High Purity Sinewave O utput • User-Specified O perating Frequency Any Frequency from 100Hz to 10kHz

FFD 455

Abstract: CA2270 FFD11 CA-575 marking code FFD CA278 5b S34 SARA-S
Contextual Info: Segmentation SARA Hardware Description SARA Chipset Technical Manual Chapter 3. Hardware Description 3.1 Segmentation SARA Hardware Description 3.1.1 Segmentation SARA Internal Block Description Figure 3-1 shows a block diagram o f the Segmentation S A R A chip.

Contextual Info: l o g i_ 7 c io 8 /io 9 128K x 8 Static RAM Low Power i c D E V IC E S IN C O R P O R A T E D FEATURES DESCRIPTION □ 128K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 15 ns maximum

PT1301

Abstract: tca 780 ez 948 MARKING CODE 21L GR-253-CORE PM5355 LT ABN pT-1301
Contextual Info: PM S TANDARD PRODUCT PMC-Sierra, Inc. ISSUE 2 PM5355 S/UNI-622 SATURN USER NETWORK INTERFACE 622 Mbit/s FEA TU R ES • Monolithic Saturn User Network Interface that implements the ATM physical layer for Broadband ISDN according to CCITT Recommendation 1.432 and the ATM

Contextual Info: ICS2595 Ifcn Integrated Circuit Systems, Inc. User-Program m able Dual High-Perform ance Clock Generator Description Features The ICS2595 is a dual-PLL (phase-locked loop clock gener­ ator specifically designed for high-resolution, high-refresh rate, video applications. The video PLL generates any of 16

Contextual Info: DIODE M O D U LE DD90F/KD90F UL;E76102 M Power Diode Module D D 9 0 F series are designed for various rectifier circuits. D D 9 0 F has two diode chips connected in series in 25 mm (linch) width package and the mounting base is electri­ cally isolated from elements for simple heatsink construction.