000070B Search Results

C-CUBE CL450

Abstract: CL9100
Contextual Info: C L 4 5 0 MPEG V id e o D e c o d e r U s e r’s M a n u a l % C-Cube Microsystems • IVbM EbT 00DQ4Ô0 flbE ■ C-Cube Microsystems reserves the right to change any products described herein at any time and without notice. C-Cube Microsystems assumes no responsibility or liability arising from the use of the prod­

diode 1n1124a

Abstract: 1N1128A HE 4011 IC HE 4011 1N1124A 1N1124RA 1N1126A 1N1126RA 1N1128RA 1N3649
Contextual Info: MIL S PECS ICJOOODISS 00D0700 1 | “ M IL-S-19500/104C 29 November 1965 S U P E R S E D IN G M IL- S- 19500/104B NAVY 17 August 1962 M IL IT A R Y S P E C IF IC A T IO N SEM IC O N D U C T O R D E V IC E , D IO D E, SIL IC O N , P O W E R R E C T IF IE R

Contextual Info: 7S173bO 0008701 S« RAYTHEON/ TMC201imiC2111 SEMICONDUCTOR bME D - TMC2011/TMC2111 CMOS, Variable-Length Shift Register 8-Bit, 40 MHz Description Features The TMC2011 and TMC2111 are high-speed, byte-wide

Contextual Info: S ta n d a rd P ro d u c t * • PMC-Sierra, Inc. PM6344EQUAD PMC-951013 ISSUE 4 QUADE1 FRAMER FEATURES • Integrates four full-featured E1 framers and transmitters in a single device for terminating duplex E1 signals. • Software and functionally compatible with the PM6341 E1XC Single E1

Contextual Info: 524,288 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY ADVANCE INFORMATION DECEMBER 1996 • SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation • Automated Byte Write and Block Erase — Industry-Standard Command User Interface

CH341A

Abstract: digital trainer schematic diagram laf 0001 CH3401 J0123 ccs ldl HP 3D6 000A75 X77H-X70H TO SI 788 48D
Contextual Info: H i/1 I - = - ^ • QE1F Device Quad E1 Framer TXC-03104 DATA SHEET FEATURES DESCRIPTION • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and

bbu installation

Abstract: BA 59 04A FP ld9h PM4341A PM4344 SLC96 TR-NWT-000170 TR-TSY-000008 gogo board Accunet T1.5 pub 62411
Contextual Info: S tandard P roduct I I V IV _ PMC-Sierra, Inc. P M 4344 TQ U A D ISSUE 5 QUAD T1 FRAMER FEATURES • Integrates four full-featured T1 framers and transmitters in a single device for terminating duplex DS-1 signals. • Software and functionally compatible with the PM4341A T1XC Single T1

Contextual Info: ADMA-T1 Device DS1 to VT1.5 Async Mapper-Desync TXC-04001 DATA SHEET FEATURES . DESCRIPTION • Add/drop two DS1s from SONET bus through asynchronous VT1.5 mapping • Handles both STS and VT pointer tracking • Monitors bus parity, SONET loss of pointer, and

Contextual Info: own CML Semiconductor Products PRODUCT INFORMATION FX506 Mobile Radio Audio Processor Product Summary Features/Applications • Full Rx and Tx Filtering to CEPT Standards • Digital Control of Volume, Noise Squelch and R.S.S.I. • Tx VOGAD Circuitry •

Contextual Info: DHR Series C T O fc 1.27 .050") centerline Interface Connectors with coaxial contacts APPLICATION High resolution color/monochrome monitors, networking interface data and power/signal transmission lines. FEATURES • Space saving 1.27mm (.050") centerline

65C816

Abstract: HMT 712 JL - 012C wdc 1994 CRR 5888 E02L XS28 00FF W65C816S e05a
Contextual Info: Introduction The W65C265S chip has firmware to handle interrupts, serial buffering, the real time clock, and the power down mode. It also has a user interface program, called the monitor. The monitor acts as a simple operating system, allowing the user to examine registers and memory, load and

WSI 57C257

Abstract: 57c257
Contextual Info: WAFER SCALE B TE INTEGRATION D C3 ^53=^0 0D0Q7Q1 liJAF T WS27C240L ADVANCE INFORMATION WAFERSCALE INTEGRATION , INC. 'T '% * av i p i 4 Meg 256K x 16 CMOS EPROM KEY FEATURES • Ultra-High Performance — 120 • EPI Processing ns — — • Simplified Upgrade Path

C8518

Contextual Info: I nterna t/onal C8518 S em ico nducto r , I nc . GENERAL PURPOSE DIODE FEATURES :o Hermetically sealed Double Plug Construction High Conductance Extremely Low Reverse current Ultra-Stable Operation Up To 175° c •068/.075 T 1 .7 3 /1 .9 3 1.000 MIN 2 5 ,4 0 0

lts 543 pin configuration

Abstract: lts 543 pin diagram lts 543 series pin diagram AUK 534 lts 542 pin diagram LTS 543 dmo 565 r lts 543 data sheet AUK 548 lts 542
Contextual Info: Philips Semiconductors Preliminary specification Drive processor for DCC systems SAA3323 FEATURES fD IG IT A L • Operating supply voltage: 2.7 to 3.6 V croc: • Low power dissipation: 84 mW typ • Single chip digital equalizer, tape formatting and error

Contextual Info: FS: 11/92 Page A . 1 SIEMENSAG preliminary DATA-SHEET TUA 4300 Table of Contents ONE CHIP CAR RADIO Differences to the last edition Page O.b Table of Contents Page A.1 Functional Description, Application Page B .2. B.3 Circuit Description Page C .4. C.5

Contextual Info: SONY CXD2424R Preliminary Timing Generator for Progressive Scan CCD Image Sensor Description The CXD2424R is an 1C developed to generate the timing pulses required by the Progressive Scan CCD image sensors as well as signal processing circuits. Features • CCIR support

bel 100n

Abstract: CXT8192 RSU2 RSU2 series CS61574 CS61574A CS61575 CS62180B HP3785A HP37
Contextual Info: CS61574A CS61575 A Cirrus Logic Company T1/E1 Line Interface Features General Description • Provides Analog Transmission Line Interface for T1 and E1 Applications • Provides Line Driver, Jitter Attenuator and Clock Recovery Functions • Fully Compliant with AT&T 62411

AS4C1M16ES

Abstract: 4C1M16E5 LR 3441 1MX16 AS4C1M16E5 LMZ 9 4C1M16E5-60
Contextual Info: H ig h P e r fo r m a n c e lM x 16 CM OS DRAM » II A S4C 1M 16E 5 I lM x 16 CMOS EDO DRAM Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1024 refresh cydes, 16 ms refresh interval - RAS-only o r CAS-before-RAS refresh

SAA7347

Abstract: SAA7345 SAA7346 SAA7346H SAA7370 TDA1301 UGA370
Contextual Info: Philips Semiconductors Preliminary specification Shock absorbing RAM addresser SAA7346 FEATURES GENERAL DESCRIPTION • Absorbs shocks from x, y and z directions The SAA7346 can be used to make a CD player insensitive to shocks. To do this, SAA7346 operates

CS2181

Abstract: HEC 50 E3 CS2180 TXC-05150-MB txc 7a atm header error checking dsl CT 7A2 RTD16 SU310 CS21M
Contextual Info: CDB Device Cell Delineation Block TXC-05150 DATA SHEET Preliminary FEATURES DESCRIPTION ATM cell delineation per CCITT 1.432 ATM cell rate adaptation Identifies OAM F4 cells and non-user cells Operation from 1.544 Mbps to 155.52 Mbps Programmable interfaces to DS1, DS3, E1, E3,