"GATE ARRAY" HITACHI Search Results

HG62F

Abstract: V/HG62F HG62F43
Contextual Info: #U 210 HG62F SERIES Hitachi CMOS Gate Array High I/O to Gate Ratio JANUARY, 1990 0 H IT A C H I The F series consists of 6 masterslices ranging from 2,178 to 10,076 available gates with high I/O pin counts ranging from 136 pins to 208 pins. The HG62F series is a mastersliced gate array fabricated on 1.0

TT 2222 Horizontal Output Transistor pins out

Abstract: transistor tt 2222 TT 2222 Horizontal Output voltage TT 2222 tt 2222 Datasheet vhdl code for complex multiplication and addition PCI33 XCV405E XCV50E XCV812E
Contextual Info: Virtex -E 1.8 V Extended Memory Field Programmable Gate Arrays R DS025-2 v2.0 November 16, 2001 Preliminary Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array (see Figure 1) comprises two major configurable elements: configurable

Virtex-E

Abstract: schematic diagram UPS UPS control circuitry, clock signal vhdl code for complex multiplication and addition LVCMOS25 PCI33 XAPP130 XCV405E XCV812E BG432
Contextual Info: Virtex -E 1.8 V Extended Memory Field Programmable Gate Arrays R DS025-2 v2.2 September 10, 2002 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array (see Figure 1) comprises two major configurable elements: configurable

Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.6 November 19, 2002 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

vhdl code for lvds driver

Abstract: IQ GENERATOR CODE WITH VHDL dual lvds vhdl
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.0 April 2, 2001 Preliminary Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

sis 968

Abstract: vhdl code for complex multiplication and addition 200E 300E 400E 600E PCI33 3 bit right left shift register verilog vHDL prog
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.3 November 9, 2001 Preliminary Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

HS253

Contextual Info: ADE-206-001 C H Feb. 1990 HG 62 E SERIES (H itachi C M O S Gate Array) 0 H IT A C H I The HG62E series is a master slice CMOS gate array o f w hich the gate length is 1 fim and uses 2-layer metal interconnect technology. Auto-diagnosis is a typical feature o f HG62E

TT 2222 Horizontal Output Transistor pins out

Abstract: transistor tt 2222 TT 2222 Horizontal Output voltage TT 2222 tt 2222 Datasheet DS022-2 sis 968 verilog code for lvds driver vhdl code for complex multiplication and addition 200E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.6.1 June 15, 2004 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

sis 968

Abstract: 200E 300E 400E 600E LVCMOS25 PCI33
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.8 January 16, 2006 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.5 September 10, 2002 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.4 July 17, 2002 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

SPARTAN-II xc2s200 pq208 block diagram

Abstract: fpga frame buffer vhdl examples
Contextual Info: Spartan-II 2.5V FPGA Family: Functional Description R DS001-2 v2.0 September 18, 2000 Preliminary Product Specification Architectural Description Spartan-II Array The Spartan-II user-programmable gate array, shown in Figure 1, is composed of five major configurable elements:

SPARTAN-II xc2s200 pq208

Abstract: DS-00121 Spartan-II pin details DS001-2 upd 2816 CS144 FG256 PQ208 17S00A VQ100
Contextual Info: Spartan-II 2.5V FPGA Family: Functional Description R DS001-2 v2.1 March 5, 2001 Preliminary Product Specification Architectural Description Spartan-II Array The Spartan-II user-programmable gate array, shown in Figure 1, is composed of five major configurable elements:

SPARTAN-II xc2s200 pq208

Abstract: upd 2816 CS144 DS001-2 FG256 PQ208 TQ144 VQ100 XC2S15 XC2S30
Contextual Info: 045 Spartan-II 2.5V FPGA Family: Functional Description R DS001-2 v2.2 September 3, 2003 Product Specification Architectural Description Spartan-II Array The Spartan-II user-programmable gate array, shown in Figure 1, is composed of five major configurable elements:

HG62G

Abstract: HG62G027 HG62G019 KZL 99 0/ICE2qs01 equivalent
Contextual Info: * T 1 tí U92 A D E-206-009A HG62G Series High-Speed CMOS Gate Array HITACHI Description The HG62G series free-channel gate arrays are fabricated with 0.8 |am CMOS process and double metal interconnect technology. The HG62G series consists of 4 master slices ranging from 14,540 to

HG62S026

Contextual Info: HG62S Series High-Speed CMOS Gate Array H IT A C H I* Features Description The HG62S series free-channel gate arrays utilize a 0.8-/un CMOS process with triple metal intercon­ nect technology. The series consists of 6 master slices ranging from 26,054 to 250,000 raw gates.

HG62G019

Abstract: HG62G HG62G027
Contextual Info: HG62G Series High-Speed CMOS Gate Array ^H IT A C H I ” Description The H G 62G series free-channel gate arrays are fabricated with 0.8 pm CMOS process and double metal interconnect technology. The HG62G series consists o f 4 m aster slices ranging from 14,540 to

diode 47-6 k6 replacement

Contextual Info: Spartan-II 2.5V FPGA Family: Introduction and Ordering Information R DS001-1 v2.3 November 1, 2001 Introduction Preliminary Product Specification • The Spartan -II 2.5V Field-Programmable Gate Array family gives users high performance, abundant logic resources,

Contextual Info: Spartan-II 2.5V FPGA Family: Introduction and Ordering Information R DS001-1 v2.3 November 1, 2001 Introduction Preliminary Product Specification • The Spartan -II 2.5V Field-Programmable Gate Array family gives users high performance, abundant logic resources,

diode k5 10-16

Abstract: SPARTAN-II xc2s200 pq208 block diagram
Contextual Info: Spartan-II 2.5V FPGA Family: Introduction and Ordering Information R DS001-1 v2.2 March 5, 2001 Introduction Preliminary Product Specification • The Spartan -II 2.5V Field-Programmable Gate Array family gives users high performance, abundant logic resources,

XC2S100PQ208

Abstract: g5209 XC2S50 tq144 XC17S00A XC18V00 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30
Contextual Info: Spartan-II 2.5V FPGA Family: Introduction and Ordering Information R DS001-1 v2.3 November 1, 2001 Introduction Preliminary Product Specification • The Spartan -II 2.5V Field-Programmable Gate Array family gives users high performance, abundant logic resources,

HS173

Abstract: KCC CL-30 HG62E11 HS153 TTL 74 series HS135 HS153 sn j hs-135 HG62E33 HG62E08
Contextual Info: A D E - 2 0 6 - 0 0 1 C H Feb. 1 9 9 0 HG62E SERIES (H itachi C M O S Gate A rray) H IT A C H I The HG 62E series is a master slice CMOS gate array o f w h ich the gate length is 1 fim and uses 2-layer metal interconnect technology. Auto-diagnosis is a typ ica l feature o f HG 62E

Contextual Info: 4AK21 Silicon N-Channel Power MOS FET Array HITACHI Application High speed power switching Features • Low on-resistance RDS on < 0.09 Q, Vo, = 10 V, ID = 4 A R ds(oii) —0.12 £2, \ GS = 4 V, ID = 4 A • Capable of 4 V gate drive • Low drive current

Contextual Info: 4AK22 Silicon N-Channel Power MOS FET Array HITACHI Application High speed power switching Features • Low on-resistance Rds«*, - 0-4 £2, Vos = 10 V, ID= 1.5 A RDS on)<0.55 a VGS = 4 V, ID= 1.5 A • Capable of 4 V gate drive • Low drive current •