ZL30 Search Results

ZL30142GGG2

Abstract: ZL30142 GR-1244 GR-253
Contextual Info: ZL30142 SyncE SONET/SDH G.8262/Stratum 3 System Synchronizer Short Form Data Sheet February 2009 Features • Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks EEC option 1 and 2 • Supports the requirements of Telcordia GR-1244

ZL30321

Abstract: ZL30116 GPON ONT ONU H1-LOCK GR-253 ZL30121 ZL30130 ZL30138 ZL30321GGG "network interface cards"
Contextual Info: ZL30321 GbE/SONET/SDH/PDH Network Interface Synchronizer Short Form Data Sheet February 2008 Features • Ordering Information Provides synchronous clocks for network interface cards that support synchronous Ethernet SyncE in addition to telecom interfaces (e.g. T1/E1,

ZL30130

Abstract: Synchronous Ethernet ZL30136 GR-1244 GR-253 ZL30117 sdh markings
Contextual Info: ZL30130 OC-12/STM-4 SONET/SDH/GbE Stratum 2/3/3E System Synchronizer/SETS Short Form Data Sheet February 2008 Features Ordering Information • Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks EEC option 1 and 2 •

GR-253-CORE

Abstract: ZL30119 ZL30119GGG ZL30119GGG2 "network interface cards"
Contextual Info: ZL30119 SONET/SDH Low Jitter Line Card Synchronizer Data Sheet December 2005 A full Design Manual is available to qualified customers. To register, please send an email to TimingandSync@Zarlink.com. Ordering Information ZL30119GGG 100 Pin CABGA Trays ZL30119GGG2 100 Pin CABGA*

ZL30123

Abstract: GR-253-CORE STM-16 ZL30123GGG ZL30123GGG2 "network interface cards"
Contextual Info: ZL30123 SONET/SDH Low Jitter Line Card Synchronizer Data Sheet May 2006 A full Design Manual is available to qualified customers. To register, please send an email to TimingandSync@Zarlink.com. Ordering Information ZL30123GGG 100 Pin CABGA Trays ZL30123GGG2 100 Pin CABGA*

Contextual Info: ZL30130 OC-12/STM-4 SONET/SDH/GbE Stratum 2/3/3E System Synchronizer/SETS Short Form Data Sheet February 2008 Features Ordering Information • Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks EEC option 1 and 2 •

Contextual Info: ZL30159 General Purpose Clock Rate Converter Short Form Data Sheet March 2013 Features • Precision synthesizer generates any clock-rate from 1 Hz to 177.5 MHz with jitter below 1ps • Programmable digital PLL synchronize to any clock rate from 1 Hz 1 pps to 750 MHz

GR-253-CORE

Abstract: STM16 STM-16 ZL30406 ZL30406QGC ZL30406QGG1 CML termination 50 Ohm external termination volt
Contextual Info: ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features March 2006 • Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates • Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates • Provides four LVPECL differential output clocks at

GR-1244-CORE

Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1
Contextual Info: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features November 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

9270N

Abstract: GR-1244 GR-253 GR-253-CORE STM-16 ZL30117 ZL30119 ZL30121 ZL30121GGG ZL30121GGG2
Contextual Info: ZL30121 SONET/SDH Low Jitter System Synchronizer Data Sheet May 2006 A full Design Manual is available to qualified customers. To register, please send an email to TimingandSync@Zarlink.com. Ordering Information ZL30121GGG ZL30121GGG2 Features • • Internal APLL provides standard output clock

Contextual Info: ZL30160 Four Channel Universal Clock Translator Short Form Data Sheet January 2012 Features Ordering Information • Four independent clock channels • Programmable synthesizers generate any clockrate from 1 kHz to 750 MHz • Two precision synthesizers generate clocks with

Contextual Info: ZL30153 Synchronous Ethernet Network Synchronization DPLL Short Form Data Sheet February 2012 Features • • Ordering Information ZL30153GGG 100 Pin LBGA ZL30153GGG2 100 Pin LBGA* Supports requirements of ITU-T G.8262 for Synchronous Ethernet Equipment Slave Clocks

Contextual Info: ZL30301 Timing over Packet ToP Technology Data Sheet Features September 2005 • Recovers and transmits network synchronization over Ethernet, IP and MPLS Networks • Output clocks meet ITU-T G.823 and G.824 traffic interface specifications, and ANSI T1.403 timing

GR-1244-CORE

Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1 TC65D
Contextual Info: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features November 2004 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

Contextual Info: ZL30161 Network Synchronization Clock Translator Short Form Data Sheet May 2013 Features • Ordering Information ZL30161GDG2 144 Pin LBGA Trays Fully compliant SEC G.813 and EEC (G.8262) flexible rate conversion digital phase locked loop (DPLL) Pb Free Tin/Silver/Copper

Contextual Info: ZL30112 SLIC/CODEC DPLL Data Sheet Features November 2009 • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input • Provides 2.048 MHz and 8.192 MHz output clocks and an 8 kHz framing pulse • Automatic entry and exit from freerun mode on reference fail

ZL30343

Contextual Info: ZL30343 SyncE/SONET/SDH G.8262/Stratum3 SETS & IEEE 1588 Packet G.8261 Synchronizer Short-Form Data Sheet June 2012 Features Ordering Information • Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks EEC option 1 and 2

Contextual Info: ZL30312 Combined Synchronous Ethernet and IEEE1588 Network Synchronization Data Sheet Features October 2012 • Supports Hybrid Mode using SyncE for frequency synchronization and IEEE 1588 for phase alignment • Recovers and transmits network synchronization

Contextual Info: ZL30230 Four Channel Universal Clock Generator Short Form Data Sheet January 2012 Features • • • Ordering Information Generates clock signals at power-up per user defined custom OTP One Time Programmable configuration ZL30230GGG 100 Pin LBGA ZL30230GGG2 100 Pin LBGA*

Contextual Info: ZL30162 Network Synchronization Clock Translator Short Form Data Sheet April 2013 Features • • • • • Ordering Information Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC rates • Automatic hitless reference switching and digital

Contextual Info: ZL30414 SONET/SDH Clock Multiplier PLL Data Sheet Features • February 2005 Meets jitter requirements of Telcordia GR-253CORE for OC-192, OC-48, OC-12, and OC-3 rates • Meets jitter requirements of ITU-T G.813 for STM64, STM-16, STM-4 and STM-1 rates •

ZL30230

Contextual Info: ZL30230 Four Channel Universal Clock Generator Short Form Data Sheet January 2011 Features • • Ordering Information Operates from a single crystal resonator, clock oscillator or voltage controlled oscillator ZL30230GGG ZL30230GGG2 Four independently programmable clock

GR-1244

Abstract: TCXO 20 MHZ ZL30143 ZL30136 CABGA msap ZL30145 ZL30106 ZL30108 ZL30112
Contextual Info: TIMING AND SYNCHRONIZATION PRODUCT CATALOG ZL30110 ZL30112 ZL30113 Rate Conversion PLLs PDH ZL30106 Line Card Synchronizers SyncE/ SONET/SDH SyncE SONET/SDH SyncE GR-1244 Stratum 4/4E G.823, G.824 PDH GR-1244 Stratum 3 G.823, G.824 System Synchronizers

Contextual Info: ZL30226/227/228 4/8/16 Port IMA/TC PHY Device for xDSL Data Sheet Features March 2003 IMA • • • • • Up to 16 xDSL links & up to 8 IMA groups with 1 to 16 links/IMA group1 Supports symmetrical & asymmetrical operation CTC common transmit & ITC (independent