YJA 9 Search Results

Contextual Info: ALLEGRO MICROSYSTEMS INC TS » 0 S 0 4 3 3 Ô 0 0 0 3 7 4 '} 4 • A L GR T -9 1 -0 1 P R O C E S S YJA Process YJA PNP Power Darlington Transistor Process Y JA is an epitaxial planar P N P silicon Darlington transistor. It is designed for use in highgain, high-power applications. It is the P N P comple­

UFF 50-02

Abstract: THC3719 THC3720 THC3867 THC3868 THC5193 THC5194 THC5195 THC5333 THC6034
Contextual Info: A L L E GR O M I C R O S Y S T E M S 8 5 1 4 0 1 9 S P R A GU E. INC ^3 D • 05GM33Ô S E M I C O N D S / ICS D0D3S7Ö 3 ■ AL GR 93D 03578 if BIPOLAR TRANSISTOR CHIPS PNP Transistors Power Devices ELECTRICAL CHARACTERISTICS at TA = 25°C Device Type THC3719

yja 9

Contextual Info: w ' S P R AG U E / S E M I C O N D 8 5 14 0 19 SPRAGUE. GROUP 1 3 5 • Ö S 13flS D S E M I C O N D S / ICS Ü D 03S 7Ö 4 ■ 93D 03578 $ BIPOLAR TRANSISTOR CHIPS PNP Transistors Power Devices ELECTRICAL CHARACTERISTICS at TA = 25°C DC Current Gain 'cBO

AADV

Contextual Info: VdZ IÇ'Z'Zi w oj ¿ L JO I A3H 133HS 6Z.Z.00 ÇÇ0ÏZZ' ON 3NIMVMQ 3000 33V0 LV ±H3I3M - T 3ZIS 03 dS NOIlVOnddV SQV31 1U SS3dd HUM ‘MOd 9 "IVOIl^BA 1VNDIS a A lulu z HDVd-Z ‘ATISyOSSV Nld 03d5 lonaoud 3HVN SOHJODD6B 8 0 9 C —SO LZ. L Dd ‘B-inqsujD H

Contextual Info: ALLEGRO MICROSYSTEMS INC =13 D • 0S0433Ö 0G037M7 □ ■ A L GR T-91-01 PROCESS YFA Process YFA NPN Power Darlington Transistor Process YFA is a double-diffused epitaxial planar N P N silicon Darlington pair. It is designed for use in high-gain, high-power amplifiers. Its complement is

Contextual Info: SK25GAD063T C- R PO S$@ 407,- %*8,23.-, -', .6.,+ Absolute Maximum Ratings Symbol Conditions IGBT T$LA CU R PO S$ E$ CU R XPO S$ E$[¥ *'-) MWW T NW Y C- R ZW S$ PX Y MW Y ] PW T XW a- E$[¥R P : E$0%& T$$ R NWW T^ TFL _ PW T^ T$LA ` MWW T Inverse Diode IGBT Module

yja 9

Abstract: f41 marking
Contextual Info: SCI7700YSeries/SCI7701 YSeries CMOS VOLTAGE DETECTOR • DESCRIPTION The SCI7700YSeries/SCI7701 YSeries are a series of low-power precision voltage detectors, which do not require external adjustments. The SCI7700YSeries/SCI7701 YSeries have such applications as battery-life

4609

Contextual Info: 4609 TRIODE for use in téléphoné equipment TRIODE pour utilisation en équipement téléphonique TRIODE zur Verwendung in Telephon-Anlagen Heating Chauffage: Heizung :direct by D.C.; series or parallel supply direct par C.C.; Vf alimentation en série ou

40T125

Abstract: PA886C02 SC-65 a509
Contextual Info: PA 886C02 3 oa * 3 SCHOTTKY BARRIER DIODE • 43H 5 : Features • W Low V f • X < "j * > V * i f - W # # 1 - & 1 ' Super high speed switching. • ^ i x — # ■ -a « c = ¿ f t » « « « * C o n n e c tio n D ia g ra m High reliability by planer design.

Contextual Info: ASSPs Pow er S upply ICs •High precision voltage regulator Output voltage percision:±2.5% Part number Output voltage (V-typ.) Output current (mA-typ.) SCI7810YFA 2.2 10 (Vl=3V) SCI7810YLA 2.6 30 (Vl=5V) SCI7810YRA 2.8 30 (Vi=5V) SCI7810YDA 3.0 30 (Vl=5V)

Contextual Info: 1A1 THRU SEM ICO N DU CTO R FORW ABD B frE K H A n O N A L ELECTRONICS LTD. 1 A7 TECHNICAL DATA TECHNICAL SPECIFICATIONS OF SILICON RECTIFIER VOLTAGE RANGE - 50 to 1000 Volts CURRENT - 1.0 Ampere FEATURES * High reliability * Low leakage v» * Low l o r w a r d v o lta g e d rop

CL 2181

Abstract: I68-I Molex 5283
Contextual Info: 10 NOTES: I. MATERIAL: HOUSING: POLYESTER, G.F. UL 94V-0 , COLOUR - BLACK. TERMINAL: PHOSPHOR BRONZE. 2. TERMINAL PLATING: 90635-*! : CONTACT AREA: GOLD FLASH (0. lum)/ 4uln MIN I.D. AREA: TIN (lum)/ 39uin MIN. OVER NICKEL (lum )/ 39uin MIN. 90635-*2 ¡CONTACT AREA: GOLD <0.76um)/ 30uin MIN

Contextual Info: PRELIMINARY MICZRON I 16 MEG X 4 FPM DRAM H R AM LSHMIVI MT4LC16M4A7 MT4LC16M4T8 FEATURES PIN ASSIGNMENT Top View • Single +3.3V ±0.3V power supply • Industry-standard x4 pinout, timing, functions and packages • 13 row, 11 column addresses (A7) 12 row, 12 column addresses (T8)

RE LOG 2 TZ 11

Abstract: "halbleiterwerk frankfurt" halbleiterwerk Halbleiterwerk Frankfurt ddr veb VEB Halbleiterwerk Frankfurt scans-048 Frankfurt Oder L192A1A2 Deutschen Demokratischen Republik
Contextual Info: V o rlä u fig e S c h a ltk re is DL 192 D DL 193 D D ie der L o w -Pow er~ Sch o ttk y-T echn o log ie der b eiden Z ä h lim p u ls e B e id e Z ä h le r M it ja te n e in g ä n g e n vorw ärts e in e s TV w ird davon vo rw ä rts b e stim m t, und TR

Contextual Info: M IC R O N 512K 512K X MT20D51240 40 DRAM MODULE 40 DRAM FAST PAGE MODE MT20D51240 LOW POWER, EXTENDED REFRESH (MT20D51240 L) FEATURES • • • • • • • • • PIN ASSIGNMENT (Top View) 72-pin single-in-line package High-performance, CMOS silicon-gate process.

MT8D132G-6

Abstract: MT4C4001
Contextual Info: I^ i c r o n 1 MEG DRAM _ _ _ _ _ _ _ 1 MEG x 32, 2 MEG x 16 _ FAST PAGE MODE MT8D132 LOW POWER, F EXTENDED Y T P M n F n RF REFRESH (MT8D132 L) MODULE 1 •1 MT8D132 32, 2 MEG x 16 DRAM M O D ULE X 1- ^ V / k . L . FEATURES • Industry-standard pinout in a 72-pin single-in-line

WTS 1.7 IC 28 PIN

Abstract: wts 28 pin ic
Contextual Info: ADVANCE I^ IIC R O N 4 MEG DRAM MODULE 4 MEG X X MT10D440 40 DRAM MODULE 40 DRAM FAST-PAGE-MODE • • • • • Industry-standard 72-pin single in-line package High-performance CMOS silicon-gate process Single 5V ±10% power supply All device pins TTL-compatible

MT9259

Abstract: 1259EJ
Contextual Info: I^ IIC Z R O N MT9259 256K X 9 DRAM DRAM MODULE PIN ASSIGNMENT Top View OPTIONS Vdd CSS DQ1 A0 A1 DQ2 A2 A3 Vss DQ3 A4 A5 DQ4 A6 A7 DQ5 A8 NC NC DQ6 W Vss DQ7 PHD DQ8 09 RAS CSS9 D9 Vdd MARKING • Timing 80ns access 100ns access 120ns access 150ns access

DDS1141

Abstract: L4916 QDS1140
Contextual Info: ¿= 7 S G S - 1H 0 M S 0 N ^ 7# RiOD [S©i[LIl g^@R!]D©i L4916 VOLTAGE REGULATOR PLUS FILTER • F IX E D O U T P U T V O L T A G E 8.5V • 250mA O U T P U T C U R R E N T • HIGH R IP P L E R E JE C T IO N A supervisor iow-pass loop of the element pre­

Contextual Info: MICRON MT8D1 32 S l MT16D232(S) 1 MEG, 2 MEG x 32 DRAM MODULE TSCHNOLOO. INC DRAM 1 MEG, 2 MEG x 32 n n r\r\n t c 4>8 m e g a b yte s, sv, f a s t page mode, OPTIONAL SELF REFRESH IVIUUULE FEATURES PIN ASSIGNMENT (Front View) • JEDEC- and industry-standard pinout in a 72-pin,

Contextual Info: 4, 8 MEG X 36 PARITY DRAM SIMMs MICRON I TECHNOLOGY. INC. QRAM LSI l i b i v i MODULE MT12D436 MT24D836 FEATURES • JEDEC- and industry-standard pinout in a 72-pin, single in-line memory module SIMM • 16MB (4 Meg x 36) and 32MB (8 Meg x 36) parity versions

t3d19

Abstract: MT4C1024DJ a7020
Contextual Info: [MICRON □PAM _ _ _ _ . . _ 1 MEG X MT3D19 9 DRAM MODULE 1 MEG x 9 DRAM _ FAST-PAGE-MODE MT3D19 LOW POWER, EXTENDED REFRESH (M T3D19 L) MODULE \J L. t . IVIv y U FEATURES PIN ASSIGNMENT (Top View) • Industry-standard pinout in a 30-pin single-in-line

Contextual Info: MT9D49 MICRON I 4 MEG X 9 DRAM MODULE TECHNOLOGY INC. DRAM MODULE 4 MEG x 9 4 MEGABYTE, 5V, FAST PAGE MODE FEATURES • JEDEC- and industry-standard pinout in a 30-pin single-in-lme m emory module SIMM • High-perform ance CM OS silicon-gate process • Single 5V ±10% power supply

BT-250

Abstract: Led receptor tv
Contextual Info: a - ,n n n n r n AMPROBF BT-250 tosfruer icn ts rápidas d s fc cn iana? Circuit Breaker Identifier Kit 1. Quick Start Instructions t. In s ta ll a fre sh 9 -vott battery in the receiver Bacery not inductecf . 2. Plug the transmitter rto the fva wa& outtet (See