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    YA19 Search Results

    YA19 Datasheets (1)

    Nortel Networks
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    YA19
    		Nortel Networks 2.5 Gb/s 16:1 Multiplexer and Clock Generator Original PDF 261.8KB 12
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    YA19 Price and Stock

    ITT Interconnect Solutions

    ITT Interconnect Solutions DAMN-7H2S-Y-A197

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    ITT Interconnect Solutions DCMZ-8X8S-Y-A197

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    ITT Interconnect Solutions DBMT-9H4S-Y-A197

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    YA19 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    YA19

    Abstract: QMV10 c455 AB89 AC10 YA08 YA18 YA20 nortel networks multiplexer nortel demux
    Contextual Info: YA19 2.5 Gb/s 16:1 Multiplexer and ClockGenerator Data Sheet Features Meets or exceeds all relevant ANSI, ITU and Bellcore specifications LVPECL 100 k inputs accept signals of 155 Mb/s data rate Differential data outputs provide CML signals at 2.5 Gb/s with 3.3 V


    Original     		16-bit 155MHz YA19 QMV10 c455 AB89 AC10 YA08 YA18 YA20 nortel networks multiplexer nortel demux PDF

    1 into 16 demultiplexer circuit diagram using 1 i

    Abstract: 1 into 12 demultiplexer circuit diagram 1 into 16 demultiplexer circuit diagram ip 65 equipment qmv10 AB89 AC10 UT15 AC10 post amplifier YA18
    Contextual Info: YA20 2.5 Gb/s 1:16 Demultiplexer Data Sheet Features Data and clock inputs accept differential CML signals at up to 2.5 Gb/s Internally generated divide-by-16 clock and deserialized data delivered via PECL 100 k outputs Fully differential internal logic for


    Original     		divide-by-16 16-bit 1 into 16 demultiplexer circuit diagram using 1 i 1 into 12 demultiplexer circuit diagram 1 into 16 demultiplexer circuit diagram ip 65 equipment qmv10 AB89 AC10 UT15 AC10 post amplifier YA18 PDF

    1 into 16 demultiplexer circuit diagram using 1 i

    Abstract: 1 into 12 demultiplexer circuit diagram Nortel demux AB89 AC10 YA08 YA18 YA19 YA20 1 into 4 demultiplexer circuit diagram
    Contextual Info: YA20 2.5 Gb/s 1:16 Demultiplexer Data Sheet Features Data and clock inputs accept differential CML signals at up to 2.5 Gb/s Internally generated divide-by-16 clock and deserialized data delivered via PECL 100 k outputs Fully differential internal logic for


    Original     		divide-by-16 16-bit 1 into 16 demultiplexer circuit diagram using 1 i 1 into 12 demultiplexer circuit diagram Nortel demux AB89 AC10 YA08 YA18 YA19 YA20 1 into 4 demultiplexer circuit diagram PDF

    2ya18

    Abstract: nortel demux ya18 FZT968 nortel YA YA19 YA20 AB89 AC10 OC48
    Contextual Info: YA18 2.5 Gb/s Clock and Data Recovery Circuit Data Sheet Features Fully balanced, differential architecture from input to output Differential CML data input accepts signals of up to 2.7 Gb/s data rates - 50 Ω terminated 50 Ω terminated differential CML


    Original     		PDF

    Nortel demux

    Abstract: NORTEL laser YA26 AB89 AC10 YA08 YA18 YA19 YA20 laser diode driver 200 mhz
    Contextual Info: Preliminary YA08 2.5 Gb/s Laser Diode Driver with Mean Power Control Data Sheet Features Full mean power control operation CMOS compatible laser disable input Bias current range: 5 mA to 100 mA Modulation current range: 10 mA to 80 mA Fully differential data input, PECL


    Original     		PDF

    AB89

    Abstract: AC10 NTW103AE YA08 YA18 YA19 YA20 YA26 nortel TX circuit qmv10
    Contextual Info: YA08 2.5 Gb/s Laser Diode Driver with Mean Power Control Data Sheet Features Full mean power control operation CMOS compatible laser disable input Bias current range: 5 mA to 100 mA Modulation current range: 10 mA to 80 mA Fully differential data input, PECL


    Original     		PDF