YA14 Search Results

SO-239

Abstract: YA140 YA5900
Contextual Info: Base Station Antennas M 0DEI Ì-KEQUENCV M O D tt FR EQ U ENC Y CONNECTOR SO-239 YA6 800 806-896 MHz YA5800 806-896 M Hz N Female 420-440 MHz SO-239 Ä6900 890-960 MHz YA5900 890-960 MHz N Female 440-460 MHz SO-239 M O D I! FR FQ U FNCY YA140 6PL 4 0 6 -4 2 0

k0312

Abstract: yb06 YB04 YA16 apl 117 yb07 y802 AWa3 74N10 V18-Y3S
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY • 64 x 18 Bit W ide R egister File The Am29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined Data Path The Am 29C334 can be configured to support either a

D950

Abstract: D952 ST18952 Ya13 SCR SN 102 YBs 70 YA11
Contextual Info: ST18952 DIGITAL SIGNAL PROCESSOR DSP CHIP PRELIMINARY DATA • ■ ■ Programmable D950 Core ■ Data calculation unit ■ Address calculation unit ■ Program control unit ■ Fast and flexible buses ■ 66MIPS - 15 ns instruction cycle time 16.5 Kwords data memory (RAM)

PIR CONTROLLER LP 0001

Abstract: ED-9P PDCR 912 pdcr 921 23D31 D950 D950CORE ST18-AU1 dialnorm dynamic range dsei 17-12
Contextual Info: ST18-AU1 SIX-CHANNEL DOLBY AC3/MPEG2 AUDIO DECODER PRELIMINARY DATA FEATURES • ■ ■ ■ Single chip multi-function audio decoder able to decompress DOLBY AC-3, MPEG-1 and MPEG-2 audio streams. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Emulation unit and TAP

vhdl code for 8-bit serial adder

Abstract: dse1 D950-CORE ieee floating point alu in vhdl vhdl code for 16 bit barrel shift register vhdl code for 8-bit adder
Contextual Info: D950-CORE 16-Bit Fixed Point Digital Signal Processor DSP Core • ■ ■ ■ ■ OUTPUT CLOCKS 16 XA-bus 16 YA-bus 16 CALCULATION 16 UNIT PROGRAM CONTROL UNIT 3 ID-bus 16 IA-bus 16 DATA MEMORY 6 ADDRESS PROGRAM MEMORY ■ UNIT VDD VSS ■ DATA CALCULATION

YB17

Abstract: A09 N03 yb04 b09 n03 GE H11 A10 K/1/64W am29c332
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit W ide R egister File The Am 29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined D ata Path The Am 29C 334 can be configured to support either a

lzl 24h

Abstract: pioneer PAL 007 A CNC DRIVES ford EEC V pioneer PEG 468 AM27S43 AM29300 am29325 Am29434 YA11
Contextual Info: a 32-Bit Microprosrammable Products Am29C300/29300 1 9 8 8 D ata B o o k Advanced Micro D e v ic e s a Advanced Micro Devices Am29C300/29300 Data Book 1988 Advanced Micro Devices Advanced Micro Devices reserves the right to make changes in its products without

vd950

Contextual Info: D950-CORE Preliminary Specification January 1995 This is Preliminary Data from SGS-THOMSON. Details are subject to change without notice. USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORISED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES

Yb03

Abstract: Am29325 AWA3 D01136 AM2930 AM29323 AWA CAPACITOR yb16 C6113 YB02
Contextual Info: A m 29334 Four-Port D ual-Access Register File • • Fast W ith an access tim e o f 24 ns, the Am 29334 supports 80-90 ns m icrocycle tim e when used with the Am29300 Family for 32-bit systems. 64 x 18 Bits W ide R egister File The Am29334 is a high-performance, high-speed, dual­

Contextual Info: n = T S G S -IH O M S O N ">Ji» [MI»i[LiÊiniB R!lDÊê ST 18952 DIGITAL SIGNAL P R O C ESSO R DSP) CHIP P R ELIM IN A R Y DATA • Programmable D950 Core ■ Data calculation unit ■ Address calculation unit ■ Program control unit ■ Fast and flexible buses

A149

Abstract: MA149 A249 PA2-48
Contextual Info: mA148 • mA248 • juA348 mA149 • mA249 • /iA349 QUAD OPERATIONAL AMPLIFIERS FAIRCHILD LINEAR INTEGRATED CIRCUITS G E N E R A L D E S C R IP T IO N — T h e /j A 1 48 series is a tru e quad ju A 7 4 1 . I t consists o f fo u r in d e p e n d e n t, high gain, in te rn a lly co m pe n sa te d, lo w p o w e r o p e ra tio n a l a m p lifie rs w h ic h

Contextual Info: PARTS, ACCESSORIES & TOOLS MODEL DESCRIPTION MODEL HOLE SIZE MODEL CONNECTOR YAGI 3 KITS Mounting hardware for YA3, YA5, YA6 antennas TMB34D 3/4" hole NMOKEUD NMOKEUDFME NMOKEUDFME NMOKEUDTNC No Conn FME MPL TNC SPECIFICATIONS SIZE TYPE 2" X 3.75" Fender bracket only

YA11

Abstract: 5N520 YA15 ya14 ya12 AWA3 Am29334 DA03 DA05 DA10
Contextual Info: Am29334 Four-Port Dual-Access Register File Fast W ith an access time of 24 ns, the Am 29334 supports 80-90 ns m icrocycle time when used with the Am29300 Family for 32-bit systems. 64 x 18 Bits W ide R egister File The Am 29334 is a high-performance, high-speed, dual­

b09 n03

Abstract: A09 N03 YA11 D803 yb05 L0722 L0623 k0312 apl 117 YA16
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit Wide Register File The Am29C334 is a 64 x 18-bit, dual-access RAM with two read ports and two write ports. Pipelined Data Path The Am29C334 can be configured to support either a non-pipelined data path similar to the Am29334 or a

transistor cross reference

Abstract: MPT3N40 Westinghouse SCR handbook LT 8224 ZENER DIODE sje389 N9602N npn transistor RCA 467 TFK 7 segment displays PUT 2N6027 delco 466
Contextual Info: C K TBD DOLLY LIST LOGO LIST SAFETY & RELIABLTY TEK PN SYSTEM II DIGITAL IC's MEMORIES. MOS. CM OS.ECL. TTL MICROPROCESSOR SPECIAL FUNCTION IC's DIGITAL / LINEAR ARRAYS LINEAR IC'S (PURCH) TEK-MADE IC’s 3 IC's INDEX (COLORED PGS) INCL PRGMD. SCRND.ETC

condensador 104

Abstract: A185-30-11 rele termico bobina variable diodo potencia diodo de potencia 2000 A AF460-30-11 a7530 BOBINAS DIODO rectificador
Contextual Info: Contactores Minicontactores Relés térmicos Arrancadores Índice 1 Panoramas de gama . Contactores compactos. Mando por c.a. y por c.c. .

YP-141N

Abstract: YA-501 ys-301 YP-141 N YS-701 zener diodes color coded YP-251 YP-501M yp501 surge absorber
Contextual Info: BL SURGE ABSORBER BL mini Surge Absorber BLSA , invented and produced by Japan BL Kogyo INC. , is a series of high-tech electronic components and is fully protected by international patent law . Its patent register number in Japan is HEI 7-16632 ; in USA: 08/378,969 ; in Korean: 2021/1995 ; in China: 94202711.6 . BL Surge

Contextual Info: Am29434 ECL Four-Port, Dual-Access Register File PRELIMINARY DISTINCTIVE CHARACTERISTICS • • • Fast W ith an access time o f 20 ns, the Am 29434 supports 50-60 ns microcycle time w hen used with the Am 29400 Family for 32-bit systems. 6 4 x 1 8 Bits W ide R egister File

Contextual Info: r=Z SGS-THOMSON ST18952 DIGITAL SIGNAL P R O C E SSO R DSP CHIP PR E LIM IN A R Y DATA • Programmable D950 Core ■ Data calculation unit ■ Address calculation unit ■ Program control unit 16.5 Kwords data memory TAP ■ Fast and flexible buses ■ 66MIPS - 1 5 ns instruction cycle time

Contextual Info: SGS-THOMSON ilUHgüMMÊi D950-CQRE 16-Bit Fixed Point Digital Signal Processor DSP Core PRELIMINARY DATA P erform ance • 66 Mips - 15ns instruction cycle time M em ory O rgan izatio n ■ HARVARD architecture ■ Two 64k x 16-bit data memory spaces ■ One 64k x 16-bit program memory space

25C08C

Abstract: 4YA6 Am29400
Contextual Info: Am29434 ECL Four-Port, Dual-Access Register File PRELIMINARY DISTINCTIVE CHARACTERISTICS • Fast Simplified Timing Control With an access time o f 20 ns, the Am 29434 supports 50-60 ns m icrocycle time w hen used with the Am 29400 Family fo r 32-bit systems.

450PL

Abstract: 440-470 SO-239
Contextual Info: I M O Ü FI FR EQ U ENC Y CONNECTOR 4 0 6 -4 « MH/ N Femóte YA3 450H 440-470 MHz YA3 4 70 N 470-512 MHz 406-440 MHz YA3 406 N YA3 4 9 6 PI j f i l M O D E! FR EQ U EN C Y C Q N N FC T O R YA3 40 6 W N 406-440 MHz NFeim le N Female YA34 5 0 W N 440-470 MHz

Contextual Info: 晶 發 科 技 有 限 公 司 GI FAR TECHNOLOGY CO.,LTD No. 11, Lane 249, Sec. 2, Chung Shan Rd., Shulin City, Taipei Hsien, Taiwan, R.O.C. GIF SPECIFICATIONS Customer Sign GT02-SERIAL 2008.08.27 ROHS N ECH T AR CUSTOMER : SAMPLE CODE : DRAWIG NO. : DATE

ya11

Contextual Info: 晶 發 科 技 有 限 公 司 GI FAR TECHNOLOGY CO.,LTD No. 11, Lane 249, Sec. 2, Chung Shan Rd., Shulin City, Taipei Hsien, Taiwan, R.O.C. GIF SPECIFICATIONS Customer Sign GT01-SERIAL 2008.08.25 ROHS N ECH T AR CUSTOMER : SAMPLE CODE : DRAWIG NO. : DATE