PPC405
Abstract: XAPP655 XC2VP125 Virtex-II Platform FPGA Complete All Four Module "routing tables"
Contextual Info: Application Note: Virtex-II Pro Family R Mixed-Version IP Router MIR Author: Gordon Brebner XAPP655 (v1.0) November 19, 2002 Summary This application note describes a reference design for a mixed-version IP router (MIR) servicing up to four gigabit Ethernet ports. MIRs are useful where several gigabit Ethernet networks are
|
Original
|
xapp655ppc405xc2vp125virtex-ii platform fpga complete all four module+1routing tables
|
PDF
|
|
Contextual Info: ` Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.4.1 March 24, 2003 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded
|
Original
|
ds083-118-bitff1148ff1517+2ff1696ds083-4
|
PDF
|
|
Contextual Info: Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.3 November 20, 2002 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded
|
Original
|
ds083-118-bitds083-4 |
PDF
|
PC44
Abstract: SO20 VQ44 XC17V00 XC18V00 XC2VP20 XC2VP30 XC2VP40
Contextual Info: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v5.0 April 5, 2004 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for
|
Original
|
xc18v00ds026xc18v04xc18v02+9xc18v01xc18v512pc44so20vq44xc17v00xc2vp20xc2vp30xc2vp40
|
PDF
|
AB38R
Abstract: tag l9 225 400 XC2VP20 XC2VP50
Contextual Info: Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.0 June 13, 2002 Advance Product Specification Summary of Virtex-II Pro Features • • High-performance Platform FPGA solution including - Up to twenty-four Rocket I/O™ embedded multi-gigabit transceiver blocks (based on
|
Original
|
ds083-118-bitand255-7778ds083-4+4ab38rtag l9 225 400xc2vp20xc2vp50
|
PDF
|
xc2vp1257
Abstract: 2VP125 XC2VP70 FF1704 FG456 2vp12 XC2VP50
Contextual Info: Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.2 September 27, 2002 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four Rocket I/O™ embedded
|
Original
|
ds083-118-bitxc2vp30ff1152+7ds083-4xc2vp12572vp125xc2vp70 ff1704fg4562vp12xc2vp50
|
PDF
|
XCF04S
Abstract: xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb
Contextual Info: 47 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.13.1 April 3, 2008 Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process
|
Original
|
ds123xcf04sxcf16pfsxcf32p-vog48+5xcf02s reliability report48-pin tsop package vo48xilinx spartan-ii 2.5v fpga familyfsg48xcf02s pcb
|
PDF
|
xcf16pfs
Abstract: Xilinx XCF04S XCF01S XC2V80 DS026
Contextual Info: Platform Flash In-System Programmable Configuration PROMs R DS123 v2.3 May 7, 2004 Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS FLASH Process • Endurance of 20,000 Program/Erase Cycles
|
Original
|
ds123xcf16pfsxilinx xcf04sxcf01s+2xc2v80ds026
|
PDF
|
XC3S250E design guide
Abstract: csb 485 E2
Contextual Info: <BL Blue> R DS123 v2.11 February 1, 2007 Platform Flash In-System Programmable Configuration PROMs Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs ♦ • 3.3V supply voltage Low-Power Advanced CMOS NOR FLASH Process
|
Original
|
ds123lvcmos25xc3s250e design guidecsb 485 e2 |
PDF
|
vhdl code for uart communication
Abstract: XC2VP50
Contextual Info: ` Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.4.1 March 24, 2003 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded
|
Original
|
ds083-118-bitfg676xc2vp20+5xc2vp30xc2vp40ff1517vhdl code for uart communicationxc2vp50
|
PDF
|
vhdl code for uart communication
Abstract: XC2VP50 XC2VP70 FF1704 pinout
Contextual Info: ` Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.4.1 March 24, 2003 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded
|
Original
|
ds083-118-bitds083-4vhdl code for uart communication+2xc2vp50xc2vp70 ff1704 pinout
|
PDF
|
xc18v02 Date Marking
Abstract: XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C XC18V00
Contextual Info: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v3.10 April 17, 2003 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for
|
Original
|
xc18v00ds026xc2s400exc2s600e+9xc18v02 date markingxc18v04xc18v02xc18v128xc18v04vq44cxilinx so20 marking codexc18v01vq44cxc18v01pc20c markingxc18v01so20c
|
PDF
|
ra1613
Abstract: FB360 HSTL18 XC2V3000-BG728 XC3S1000-FT256 XC3S200-ft256 X2P376 X2P528 X2P680 BGA 728 35x35 1.27
Contextual Info: XPressArray-II 0.15mm Structured ASIC Data Sheet 1.0 Key Features • Next-generation 0.15mm hybrid structured ASIC • Initializable distributed memory at speeds up to 210MHz • Platform for high-performance 1.5V/1.2V ASICs and FPGAto-ASIC conversions • Configurable signal, core and I/O power supply pin locations
|
Original
|
210mhzpci33pci66ra1613+9fb360hstl18xc2v3000-bg728xc3s1000-ft256xc3s200-ft256x2p376x2p528x2p680bga 728 35x35 1.27
|
PDF
|
XCF32PVO48
Abstract: 48-pin TSOP Package VO48 XCF08PVO48C XCF32PVOG48C XCF32PVO48C ieee 1532 XCF04SVO20C pcb footprint for XCF08PFSG48C Platform XCF01SVOG20C XCF08PFS48C
Contextual Info: 35 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.17 October 26, 2009 Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process
|
Original
|
ds123vog20xcf32pvo4848-pin tsop package vo48+8xcf08pvo48cxcf32pvog48cxcf32pvo48cieee 1532xcf04svo20cpcb footprint for xcf08pfsg48c platformxcf01svog20cxcf08pfs48c
|
PDF
|
|
|
infiniband Physical Medium Attachment
Abstract: CX27201 TLK3101 VSC7123 VSC7216-01 XC2VP20 XC2VP30 XC2VP40 XC2VP70 SIGNAL PATH DESIGNER
Contextual Info: White Paper: Virtex-II Pro Family R WP160 v1.1 October 22, 2002 Emulating External SERDES Devices with Embedded RocketIO Transceivers By: Matt DiPaolo The Virtex-II Pro Platform FPGA provides an attractive single-chip solution to serial transceiver design problems that previously required multiple
|
Original
|
wp160vsc7123vsc7216-01tlk3101+7cx27201infiniband physical medium attachmentxc2vp20xc2vp30xc2vp40xc2vp70signal path designer
|
PDF
|
spartan 3a
Abstract: SPARTAN-3 XC3S400 24v 12v 20A regulator circuit diagram power supply SAMSUNG MONITOR str panasonic 614 battery 10nF 50V X7R samsung 7 pin str for 24v 3 amp to 220 package Circuit diagram of Regulated Power supply 6V 5A EL7566 ISL6401
Contextual Info: HIGH PERFORMANCE ANALOG Power Management Application Guide for Xilinx FPGAs Using Switchers to Power Xilinx FPGAs and DDR Memory Increased gate counts and higher clock speeds in programmable logic ICs have resulted in higher current requirements while smaller device geometries are driving lower core supply voltages. Both
|
Original
|
spartan 3aspartan-3 xc3s40024v 12v 20a regulator circuit diagrampower supply samsung monitor str+6panasonic 614 battery10nf 50v x7r samsung7 pin str for 24v 3 amp to 220 packagecircuit diagram of regulated power supply 6v 5ael7566isl6401
|
PDF
|
48-pin TSOP Package VO48
Abstract: XCF16PFSG48C XCF08PFS48C XCF02SVO20C XCF16PFS48C XCF32PFSG48C XCF02SVOG20C pcb footprint FS48, and FSG48 XCF16PVOG48C XCF02SVO20C RELIABILITY REPORT
Contextual Info: 35 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.18 May 19, 2010 Product Specification Features • XCF01S/XCF02S/XCF04S • In-System Programmable PROMs for Configuration of Xilinx FPGAs • 3.3V Supply Voltage • Low-Power Advanced CMOS NOR Flash Process
|
Original
|
ds123xcf01s/xcf02s/xcf04svog2048-pin tsop package vo48+9xcf16pfsg48cxcf08pfs48cxcf02svo20cxcf16pfs48cxcf32pfsg48cxcf02svog20cpcb footprint fs48, and fsg48xcf16pvog48cxcf02svo20c reliability report
|
PDF
|
XCF02S
Abstract: pcb footprint FS48, and FSG48 XCF32P DS123 FS48 VO20 VO48 XCF01S XCF32PVO48C XCF08PFS48C
Contextual Info: R DS123 v2.6 March 14, 2005 4 2 Platform Flash In-System Programmable Configuration PROMS Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS NOR FLASH Process • Endurance of 20,000 Program/Erase Cycles
|
Original
|
ds123xcf08p/xcf16p/xcf32pvog48fsg48+10xcf01s/xcf02s/xcf04sxcf02spcb footprint fs48, and fsg48xcf32pfs48vo20vo48xcf01sxcf32pvo48cxcf08pfs48c
|
PDF
|
XC18V01SO20C
Abstract: 18V256 XC18V00 XC18V04 XC2S100 XC18V04VQ44I XC18V01PC20I
Contextual Info: XC18V00 Series of In-System Programmable Configuration PROMs R DS026 v3.5 June 14, 2002 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for
|
Original
|
xc18v00ds026xc18v01so20c18v256+4xc18v04xc2s100xc18v04vq44ixc18v01pc20i
|
PDF
|
256x16* STATIC RAM
Abstract: 32Kx1 false RAMB16 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50
Contextual Info: Single-Port Block Memory Core v6.2 DS234 April 28, 2005 Features • Fully synchronous drop-in module for Virtex , Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs • Supports all three Virtex-II write mode options:
|
Original
|
ds234256x16* static ram32kx1false+7ramb16xc2s100xc2s15xc2s150xc2s200xc2s30xc2s50
|
PDF
|
XCF08PFSG48C
Abstract: XCF01S Xilinx XCF04S pcb footprint FS48, and FSG48 XC3S500E XCF01SVO20 XCF32P DS123 FS48 VO20
Contextual Info: 47 Platform Flash In-System Programmable Configuration PROMS R DS123 v2.8 December 29, 2005 Product Specification Features • • • • • • • • • • In-System Programmable PROMs for Configuration of Xilinx FPGAs Low-Power Advanced CMOS NOR FLASH Process
|
Original
|
ds123xcf08pfsg48cxcf01sxilinx xcf04s+6pcb footprint fs48, and fsg48xc3s500excf01svo20xcf32pfs48vo20
|
PDF
|
csb 485 E2
Abstract: Xilinx XCF08P XCF01SVO20 XCF32P XCF128X fs48 xc3s400 pinout XCF32PVO48 DS123 VO48
Contextual Info: 48 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.16 November 14, 2008 Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process
|
Original
|
ds123vog20csb 485 e2xilinx xcf08p+7xcf01svo20xcf32pxcf128xfs48xc3s400 pinoutxcf32pvo48vo48
|
PDF
|
XCF32P
Abstract: XCF32PFS48C XCF08 xcf02s-vo20 pcb footprint FS48, and FSG48 XCF01S xcf32p-vog48 DS123 FS48 VO20
Contextual Info: <BL Blue> Platform Flash In-System Programmable Configuration PROMS R DS123 v2.9 May 09, 2006 Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs ♦ • 3.3V supply voltage Low-Power Advanced CMOS NOR FLASH Process
|
Original
|
ds123vog20lvcmos25xcf32p+8xcf32pfs48cxcf08xcf02s-vo20pcb footprint fs48, and fsg48xcf01sxcf32p-vog48fs48vo20
|
PDF
|
XCF16PFS48C
Abstract: XC2V80
Contextual Info: Platform Flash In-System Programmable Configuration PROMs R DS123 v2.0 November 5, 2003 Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • I/O Pins Compatible with Voltage Levels Ranging From
|
Original
|
ds123xcf01svo20xcf02svo20xcf04svo20+8xcf08pvo48xcf16pvo48xcf32pvo48xcf08pfs48xcf16pfs48xcf32pfs48xcf16pfs48cxc2v80
|
PDF
|