XCR3128XL
Abstract: LFSR COUNTER counter driver cmos XAPP346 LFSR LOW POWER CMOS LOGIC FAMILIES XAPP329 code 4 bit LFSR
Contextual Info: Application Note: CPLD R Low Power Tips for CoolRunner Design XAPP346 v1.0 October 16, 2000 Summary This document details specific implementation techniques which may be used to decrease power consumption in CPLD designs. Introduction Historically, low power designs and CPLD devices have been mutually exclusive. Early PLDs,
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xapp346xcr3128xllfsr countercounter driver cmos+4lfsrlow power cmos logic familiesxapp329code 4 bit lfsr
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8 bit LFSR
Abstract: 8 bit LFSR for test pattern generation
Contextual Info: Applications CoolRunner CPLDs CoolRunner Power-Saving Tips and Tricks These techniques can lower your CoolRunner power consumption by 40%. by Frank Wirtz Staff Applications Engineer, Xilinx Inc. frankw@xilinx.com With the advent of Fast Zero Power technology and CoolRunner CPLDs, you can
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xapp346tech40com/xapp/xapp3468 bit lfsr+18 bit lfsr for test pattern generation
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IR2181 application notes
Abstract: IR2181 MOTOR CONTROL AN2433 LM2575 NATIONAL IGBT led lm2576 AN240 LT1121N8-3 1N4148 MC68HC908GP32
Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor Application Note AN2433/D Rev. 0, 12/2002 5V to 3V Design Considerations by Gianni Filippi Applications Engineering Freescale, East Kilbride Contents Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
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an2433/dir2181 application notesir2181 motor controlan2433+7lm2575national igbtled lm2576an240lt1121n8-31n4148mc68hc908gp32
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IR2181 application notes
Abstract: an2433 led lm2576 IR2181 LM2575 OPTO TRIAC 500MA MC3320x AN240 IGBT Designers Manual LM2574
Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. Application Note AN2433/D Rev. 0, 12/2002 5V to 3V Design Considerations by Gianni Filippi Applications Engineering Motorola, East Kilbride Contents Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
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an2433/dir2181 application notesan2433led lm2576+7ir2181lm2575opto triac 500mamc3320xan240igbt designers manuallm2574
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memory device sense amplifier
Contextual Info: White Paper: CoolRunner CPLD R Fast Zero Power FZP Technology WP119 (v1.0) August 28, 2000 Summary This white paper provides an overview of the patented Fast Zero Power (FZP™) technology used in Xilinx CoolRunner CPLDs. Introduction Fast Zero Power (FZP) is the patented design technology used in Xilinx CoolRunner CPLDs
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matched filter in vhdl
Abstract: XAPP012 Insight Spartan-II demo board vhdl code for crossbar switch XAPP029 verilog code for cdma transmitter FPGA Virtex 6 pin configuration xapp005 verilog code for 16 kb ram verilog code for crossbar switch
Contextual Info: DataSource CD-ROM Q4-01 Xilinx Application Notes Summaries Title Size Summary Family Design Loadable Binary Counters 40 KB XAPP004 XC3000 VIEWlogi OrCAD Register Based FIFO 60 KB XAPP005 XC3000 VIEWlogi OrCAD Boundary Scan Emulator for XC3000 80 KB XAPP007 XC3000
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q4-01xc3000xc4000exc4000+11xc4000/xc5200matched filter in vhdlxapp012insight spartan-ii demo boardvhdl code for crossbar switchxapp029verilog code for cdma transmitterfpga virtex 6 pin configurationxapp005verilog code for 16 kb ramverilog code for crossbar switch
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XAPP346
Abstract: XAPP377 XC2C128 XC2C32 XC2C64 ULTRA HIGH SPEED FREQUENCY DIVIDER
Contextual Info: Application Note: CoolRunner-II CPLD R Low Power Design with CoolRunner-II CPLDs XAPP377 v1.0 May 8, 2002 Summary CoolRunner -II RealDigital CPLDs are the only CPLD to combine both high performance and low power to form the next generation CPLD. This application note describes the design
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xapp377xapp346xc2c128xc2c32+2xc2c64ultra high speed frequency divider
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XAPP029
Abstract: adc controller vhdl code verilog rtl code of Crossbar Switch 12-bit ADC interface vhdl code for FPGA vhdl code for pn sequence generator Insight Spartan-II demo board XAPP172 xilinx XC3000 SEU testing verilog hdl code for triple modular redundancy parallel to serial conversion vhdl IEEE paper
Contextual Info: DataSource CD-ROM Q4-01 Xilinx Application Note Summaries XAPP004 Loadable Binary Counters The design strategies for loadable and non-loadable binary counters are significantly different. This application note discusses the differences, and describes the design of a loadable binary counter.
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q4-01xapp004xapp005xc3000+16desi49xc18v00xc9500xlxc9500xvxapp501xc9500xapp029adc controller vhdl codeverilog rtl code of crossbar switch12-bit adc interface vhdl code for fpgavhdl code for pn sequence generatorinsight spartan-ii demo boardxapp172xilinx xc3000 seu testingverilog hdl code for triple modular redundancyparallel to serial conversion vhdl ieee paper
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cell phone camera module lg phone
Abstract: SPARTAN-3 XC3S400 pin rover walkie-talkie cell phone camera module lg cell phone CONTROLLED rover XC2V80 XC3S50 XAPP436 XC2V1000
Contextual Info: Application Note: CPLD Managing Power in FPGAs and Other Devices Using CoolRunner-II CPLDs R XAPP436 v2.0 June 5, 2008 Summary This application note demonstrates how multiple devices, including Virtex -II and Spartan®-3 FPGAs, can be effectively power managed by a single CoolRunner -II CPLD. It is
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xapp436cell phone camera module lg phonespartan-3 xc3s400 pinrover+6walkie-talkiecell phone camera module lgcell phone controlled roverxc2v80xc3s50xc2v1000
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