X552 Search Results

Contextual Info: XR16C864 Preliminary Information QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO DESCRIPTION The XR16C864*1 864 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554/654 and ST68C554. The 864 is an enhanced UART with 128 byte FIFO’s,

Contextual Info: XR16C854 Preliminary Information QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO DESCRIPTION The XR16C854 *1 854 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554D/654 and ST68C554/654. The 854 is an enhanced UART with 128 byte

Contextual Info: XC4000, XC4000A, XC4000H Logic Cell Array Families f l XILINX Product Description Features D e sc rip tio n • Third Generation Field-Programmable Gate Arrays - Abundant flip-flops - Flexible function generators - On-chip ultra-fast RAM - Dedicated high-speed carry-propagation circuit

552a

Abstract: NS16C550 16-BYTE 16C450 16C550 INS8250 ST16C452 ST16C552 ST16C552A TL16C552
Contextual Info: ST16C552 ST16C552A DUAL UART WITH 16-BYTE FIFO AND PARALLEL PRINTER PORT DESCRIPTION The ST16C552/ST16C552A 552/552A is a dual universal asynchronous receiver and transmitter (UART) with an added bi-directional parallel port that is directly compatible with a CENTRONICS type printer. The parallel port

16C654

Abstract: 16C554 ST68C554 XR16C864 T32h 245-7iR
Contextual Info: XR16C864 QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO July 2000 DESCRIPTION The XR16C8641 864 is a universal asynchronous receiver and transmitter (UART) with a dual interface compatible with the ST16C554/654/854 and ST68C554. The 864 is an enhanced UART with 128 byte FIFO’s, Independent

ST16C554DCJ

Abstract: 68C554 16C554D 16-BYTE 16C554 ST16C454 ST16C554CQ64 ST16C554D ST16C554DCQ64 ST68C454
Contextual Info: ST16C554/554D ST68C554 QUAD UART WITH 16-BYTE FIFO’S WOÊÊF DESCRIPTION The ST 16C554D is a universal asynchronous receiver and transmitter UART with a dual foot print interface. The 554D is an enhanced UART with 16 byte FIFOs, receive trigger levels and data rates up to 1.5Mbps.

uart with bit parity

Abstract: 16C450 NS16C450 ST16C450 ST16C452 ST16C452PS TL16C452 st16c452cj
Contextual Info: ST16C452 ST16C452PS 2 £ *E X 4 R DUAL UART WITH PARALLEL PRINTER PORT DESCRIPTION The ST16C452/ST16C452PS 452/452PS is a dual universal asynchronous receiver and transmitter (UART) with an added bi-directional parallel port that is directly compatible with a CENTRONICS type printer. The parallel

icl 7017

Abstract: 16C450 ST16C450 ST16C454 ST16C454CJ68 ST16C454IJ68 ST68C454 t31d
Contextual Info: ST16C454 ST68C454 ZfEX AR QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART r DESCRIPTION The ST16C454 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface. The 454 is an enhanced UART with data rates up to 1.5Mbps and software compatible to ST16C450.

CB4CLE

Abstract: XC4010-5PG191 XC4010-5PG191C cb4ce M16-1E X3242 cb4ce code COMPM8 XILINX 4003A XC4000
Contextual Info: YU m !V A a i Liiva XC4000, XC4000A, XC4000H Logic Cell Array Families Product Description - 288 macros, 34 hard macros, RAM/ROM compiler Description Features • Third Generation Field-Programmable Gate Arrays - Abundant flip-flops - Flexible function generators

D5631

Abstract: ST16C1551CJ28 16-BYTE 16C550 73M1550 INS8250 NS16C550 ST16C1550 ST16C1551
Contextual Info: ST16C1550/51 UART WITH 16-BYTE FIFO’S DESCRIPTION The ST16C1550, ST16C1551 series here on denoted as the 155X is a universal asynchronous receiver and transmitter (UART). The 155X is an improved version of the SSI 73M1550 and SSI 73M2550 UART with higher

16C554D

Abstract: icl 7017 DSRC icl 7017 datasheet icl 7017 power supply 16C554 Code T6S package Code T6S 16-BYTE 68C554
Contextual Info: ST16C554/554D QUAD UART WITH 16-BYTE FIFO’S August 2005 DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 PLCC Package -DSRA 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57

68C554

Abstract: ST16C554CQ64 16-BYTE 16C554 ST16C454 ST16C554D ST16C554DCJ68 ST16C554DCQ64 ST68C554 16c554d
Contextual Info: ST16C554/554D ST68C554 QUAD UART WITH 16-BYTE FIFO’S DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA 14 56 -RTSD INTA

x551ma

Abstract: MAX551
Contextual Info: 19-1260; Rev 0; 10/97 +3V/+8V, 12-Bit, Serial, Multiplying DACs in 10-Pin fiMAX Package The SPI /QSPI™ and Microwire™ -compatible 3-wire serial interface saves board space and reduces power dissipation com pared with parallel-interface devices. The MAX551/X552 feature double-buffered interface

Contextual Info: Preliminary Information XR16C2852 DUAL UART WITH 128-byte FIFO’s AND RS-485 HALF DUPLEX CONTROL DESCRIPTION The XR16C2852 2852 is a dual universal asynchronous receiver and transmitter (UART). The 2852 provides enhanced UART functions with 128 byte FIFO, automatic RS-485 half duplex control, a modem control interface,

verilog code for barrel shifter

Abstract: 16 BIT ALU design with verilog/vhdl code verilog code for ALU implementation full vhdl code for alu verilog code for implementation of rom vhdl code for 8 bit barrel shifter vhdl code for multiplexer 16 to 1 using 4 to 1 32 BIT ALU design with verilog/vhdl code verilog code for 32 BIT ALU implementation spartan 3a
Contextual Info: Synopsys Synthesis and Simulation Design Guide Getting Started HDL Coding Hints Understanding High-Density Design Flow Designing FPGAs with HDL Simulating Your Design Accelerate FPGA Macros with One-Hot Approach Synopsys Synthesis and Simulation Design Guide — 2.1i

16 BIT ALU design with verilog/vhdl code

Abstract: verilog code for barrel shifter verilog code for 4-bit alu with test bench verilog code for ALU implementation verilog code for ALU verilog code for barrel shifter and efficient add 8 BIT ALU design with verilog/vhdl code vhdl code for 8 bit barrel shifter 8 BIT ALU using modelsim want abstract pdf for barrel shifter design from computer archive
Contextual Info: Synopsys XSI Synthesis and Simulation Design Guide Getting Started HDL Coding Hints Understanding High-Density Design Flow Designing FPGAs with HDL Simulating Your Design Accelerate FPGA Macros with One-Hot Approach Synopsys (XSI) Synthesis and Simulation Design Guide — 0401737 01

ST16C552

Abstract: 552a 16-BYTE 16C450 16C550 ST16C452 ST16C552A TL16C552
Contextual Info: ST16C552 ST16C552A DUAL UART WITH 16-BYTE FIFO AND PARALLEL PRINTER PORT December 2003 DESCRIPTION The ST16C552/ST16C552A 552/552A is a dual universal asynchronous receiver and transmitter (UART) with an added bi-directional parallel port that is directly compatible with a CENTRONICS type printer. The parallel port

Contextual Info: Preliminary Information V fE X A R XR16C854 QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO H F DESCRIPTION The XR16C854 *1 854 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554D/654 and ST68C554/654. The 854 is an enhanced UART with 128 byte

Contextual Info: ST16C452 ST16C452PS X * EX4R DUAL UART WITH PARALLEL PRINTER PORT DESCRIPTION The ST16C452/ST16C452PS 452/452PS is a dual universal asynchronous receiver and transmitter (UART) with an added bi-directional parallel port that is directly compatible with a CENTRONICS type printer. The parallel

16C554DCQ

Abstract: 16C554D 16C554CQ64 16C554C 16C554DCQ64
Contextual Info: ST16C554/554D ST68C554 QUAD UART WITH 16-BYTE FIFO’S DESCRIPTION The ST 16C554D is a universal asynchronous receiver and transmitter UART with a dual foot print interface. The 554D is an enhanced UART with 16 byte FIFOs, receive trigger levels and data rates up to 1.5Mbps.

icl 7017

Abstract: INS8250 NS16450 ST16C2450 ST16C2450CJ44 ST16C2450CP40 ST16C2450CQ48 ST16C2450IJ44 ST16C2450IP40 ST16C2450IQ48
Contextual Info: ISTEXAR ST16C2450 DUAL ASYNCHRONOUS RECEIVER AND TRANSMITTER UART r DESCRIPTION The ST16C2450 (2450) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2450 is an improved version ofthe NS16450 UART with higheroperating speed and loweraccesstime. The 2450 provides

16C550

Abstract: 73M1550 INS8250 NS16C550 ST16C1550 ST16C1550CP28 ST16C1550IP28 ST16C1551
Contextual Info: 2 £ *E X 4 R ST16C1550/51 UART WITH 16-BYTE FIFO’S DESCRIPTION The ST16C1550, ST16C1551 series here on denoted as the 155X is a universal asynchronous receiver and transmitter (UART). The 155X is an improved version of the SSI 73M1550 and SSI 73M2550 UART with higher

F27D

Abstract: 16-BYTE INS8250 NS16C550 ST16C2450 ST16C2550 ST16C2550CJ44 ST16C2550CP40 ST16C2550CQ48 ST16C2550IP40
Contextual Info: ST16C2550 DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFO’S • DESCRIPTION The ST16C2550 2550 is a dual universal asynchronous receiver and transmitter (UART). The ST16C2550 is an improved version of the NS16C550 UART with higher operating speed and lower access time. The 2550

ST16C1450

Abstract: ST16C1450CJ28 icl 7017 16C450 73M1550 INS8250 NS16450 ST16C1450CP28 ST16C1451 73M2550
Contextual Info: ST16C1450/51 UNIVERSAL ASYNCHRONOUS RECEIVER/ TRANSMITTER UART DESCRIPTION The ST16C1450, ST16C1451 series (here on denoted as the 145X) is a universal asynchronous receiver and transmitter (UART). The 145X is foot print compatible to the SSI 73M1550 and SSI 73M2550 UART with one byte