X222 Search Results

SM103

Contextual Info: PRELIMINARY THE CONNOR-WINFIELD CORP. 2111 COMPREHENSIVE DRIVE. AURORA, IL 60505. FAX 630 851-5040. PHONE (630) 851-4722. HTTP://WWW.CONWIN.COM PRODUCT D ATA SHEET CRYSTAL CONTROLLED OSCILLATORS CW 0107 X222 106.25M 2.5V LVCMOS SURFACE MOUNT 7.5x5mm CRYSTAL CLOCK OSCILLATOR

sm103

Contextual Info: THE CONNOR-WINFIELD CORP. 2111 COMPREHENSIVE DRIVE. AURORA, IL 60505. FAX 630 851-5040. PHONE (630) 851-4722. HTTP://WWW.CONWIN.COM PRODUCT D ATA SHEET CRYSTAL CONTROLLED OSCILLATORS CW X222 106.25M 0426 2.5V LVCMOS SURFACE MOUNT 7.5x5mm CRYSTAL CLOCK OSCILLATOR

T85 Slide Switch

Abstract: t85 Switch X22205CAAA "Slide Switch" X2225B arcolectric arcolectric switches VDE T85 Switch SLIDE SWITCH X2225
Contextual Info: ARCOLECTRIC SPECIFICATION SHEET PRODUCT TYPE X2225B SLIDE SWITCH FEC ORDER CODE ARCOLECTRIC PRODUCT CODE DESCRIPTION 152 - 274 X2 2205CAAA Double Pole ON/OFF slide switch slider marked 120 - 240 VOLTAGE: 250V a . c . TEMPERATURE: T85 INSULATION: CLASS II TERMINAL TYPE:

DE2E3KY472

Abstract: 10J 6KV capacitor 33j 6kv 332z 1KV 472m kx250 33J 6KV 33j 3kv 10J 3kv kh472 10J 3kv SEC
Contextual Info: !Note • Please read rating and !CAUTION for storage, operating, rating, soldering, mounting and handling in this catalog to prevent smoking and/or burning, etc. • This catalog has only typical specifications because there is no space for detailed specifications. Therefore, please review our product specifications or consult the approval sheet for product specifications before ordering.

SiS5511

Abstract: AT6660
Contextual Info: SÌS5511 PCI/ISA Cache Memory Controller 2. SÎS5511 2.1 Features • S upports Intel Pentium CPU and o th er com patible CPU at 66/60/50M Hz external clock speed • Supports Slice M P Protocol • Supports the Pipelined A ddress M ode of P entium CPU.

S&EI CAPACITORS

Abstract: B-405 E824 e155 B504 x473
Contextual Info: r~ • "■ , y *- . :" . . / ^ lili ; . : ■ ~ 7 - ' . ■ . ■. - ^ ,í T . . . . . . . ff' / . .’ . '/ A» , =- ■ ; . - / . *# A * .- sei 'y ' - . - ' : : ' : . : ' . , > : r t CAPACITORS •• . METALLIZED POLYESTER CAPACITORS OvaI Wrap~and-Fill Style

2561b

Abstract: CPU 314 IFM 8kx1 RAM cy17 ALI chipset fast page mode dram controller CY2254ASC-2 CY27C010 CY82C691 CY82C693
Contextual Info: PRELIM INARY CY82C691 Pentium hyperCache™ Chipset System Controller Features Supports mixed standard page-mode and EDO DRAMs Supports the VESA Unified Memory Architecture VUMA Support for standard 72-bit-wide DRAM banks Supports non-symmetrical DRAM banks

Contextual Info: Current-compensated Chokes EMC/EMI Chokes RN series Rated currents from 0.3 to 10 A DC to 1kHz frequency Approvals 100kHz to 3MHz common-mode resonance frequency Dual-choke configurations Multiple PCB-mounting options VDE: excluding RN 102, RN 202 RN chokes are attenuating common-mode or

Contextual Info: Integrated Device Technology, Inc. ADVANCE INFORMATION IDT 79R3051 , 79R3051E IDT 79R3052™, 79R3052E IDT79R3051 FAMILY OF INTEGRATED RISControllers™ FEATURES: — On-chip DMA arbiter — Bus Interface Minimizes Processor Stalls Single clock input Direct interface to R3720/21/22 RISChipset

h420

Abstract: DS1004 MPC860 0x00034 0X00005
Contextual Info: LatticeSC MPI/System Bus April 2010 Technical Note TN1085 Introduction The embedded system bus on the LatticeSC ties all of the programmable elements together in a bus framework. There are two types of interfaces on the system bus, master and slave. A master interface has the ability to perform

63-P10-Si

Abstract: X22206601 ESS20-003 E-1048-600 SSRPC SST210 TO-253 pre-wired
Contextual Info: Power-D-Box with sockets pre-wired Description The compact 19“ Power-D-Box features aluminium profiled cross members with an anodised front plate. The panel cutout accommodates up to 30 positions numbered 1 to 30. Blanks cover unused positions, with 6, 12, 24 or 30 being ”open“.

X22261102

Abstract: ESX10-TD AD-TX-EM01 ESX10-TC-124-DC12V Zbf 34 ESX10-T ESX10-TC-124
Contextual Info: Electronic Circuit Protector ESX10-TC DC 12 V Description Electronic circuit protector type ESX10-TC is designed to ensure selective disconnection of DC 12 V load systems. NEW DC 12 V power supplies, which are widely used in industry today, will shut down the output in the event of an overload with the result that

X2225

Abstract: X22254001 50035-G32 circuit breaker cross 50022-35x7 M-Type
Contextual Info: Thermal-Magnetic Circuit Breaker 201/-WA Description Single pole thermal-magnetic circuit breaker with tease-free, trip-free, snap action mechanism and two button operation M-type TM CBE to EN 60934 . Featuring a narrow profile housing, recessed terminals,

Contextual Info: CYPRESS PRELIMINARY CY82C691 Pentium hyperCache™ Chipset System Controller Features Provides control for the cache, system memory, and the PCI bus PCI Bus Rev. 2.1 compliant Supports 3V Pentium™ , AMD K5, and Cyrix 6x86 M1 CPUs Support for WB or W T L1 cache

Contextual Info: INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER TXC • Supports All 3V Pentium Processors ■ Dual Processor Support ■ PCI 2.1 Com pliant ■ Integrated Second-Level Cache Controller — — — — — — — — — ■ ■ — — Direct Mapped Organization

82371

Contextual Info: i n ie l PRELIMINARY INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER TXC • Supports All 3V Pentium Processors ■ Dual Processor Support ■ PCI 2.1 Compliant ■ Integrated Second-Level Cache Controller — — — — — — — — — ■ Optional Error Checking and Correction

Contextual Info: PRELIMINARY in te l INTEL 440FX PCISET 82441FX PCI AND MEMORY CONTROLLER PMC AND 82442FX DATA BUS ACCELERATOR (DBX) Supports the Pentium Pro Processors at Bus Frequencies Up To 66 Mhz — Supports 32-Bit Addressing — Optimized in-Order and Request Queue

82437fx

Abstract: A7CA
Contextual Info: 82430FX PCIset DATASHEET 82437FX SYSTEM CONTROLLER TSC AND 82438FX DATA PATH UNIT (TDP) Supports all 3V Pentium Processors Integrated Second Level Cache Controller — Direct Mapped Organization — Write-Back Cache Policy — Cacheless, 256-Kbyte, and 512-Kbyte

X235

Abstract: M 6965 L 7455 Hitachi 7905 and 7805 circuit diagram isl 6265 Hitachi VC-6265 7805 and 7905 combined circuit diagram tl 7805 l X112 X187
Contextual Info: HD66523R 240-Channel Common Driver with Internal LCD Timing Circuit ADE-207-303(Z) '99.9 Rev. 0.0 Description The HD66523R is a common driver for liquid crystal dot-matrix graphic display system. This device incorporates a 240 liquid crystal driver and an oscillator, and generates timing signals (line scanning signals

82438MX

Abstract: 430MX
Contextual Info: PRELIMINARY INTEL 430MX PCISET 82437MX MOBILE SYSTEM CONTROLLER MTSC AND 82438MX MOBILE DATA PATH (MTDP) • Supports the Pentium Processor at ¡COMP® Index 615M00 MHz, iCOMP Index 735/90 MHz, iCOMP Index 1000/120, and the 75 MHz Pentium Processor ■ Integrated Second Level Cache

82441fx

Contextual Info: PRELIMINARY intel INTEL 440FX PCISET 82441FX PCI AND MEMORY CONTROLLER PMC AND 82442FX DATA BUS ACCELERATOR (DBX) Supports the Pentium Pro Processors at Bus Frequencies Up To 66 Mhz — Supports 32-Bit Addressing — Optimized in-Order and Request Queue

G175

Abstract: 234T0 82439HX CH340
Contextual Info: INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER TXC • ■ ■ ■ ■ Optional Error Checking and Correction (ECC) Supports All 3V Pentium Processors Dual Processor Support PCI 2.1 Compliant Integrated Second-Level Cache Controller — — — — — —

A26 zener

Abstract: m 3329 c1 video out pin AGP Host to PCI Bridge cdqa2 diode ZENER A26 t48 dmm X8 diode zener japan ZENER A24 zener Diode B23 440EX
Contextual Info: Intel 440EX AGPset: 82443EX PCI AGP Controller PAC Datasheet April 1998 Order Number: 290616-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability

M58BW016xB

Abstract: M58BW016BB M58BW016BT M58BW016DB M58BW016DT PQFP80
Contextual Info: M58BW016BT, M58BW016BB M58BW016DT, M58BW016DB 16 Mbit 512Kb x32, Boot Block, Burst 3V Supply Flash Memories PE4FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VDD = 2.7V to 3.6V for Program, Erase and Read – VDDQ = VDDQIN = 2.4V to 3.6V for I/O Buffers