X1 TRANSISTOR Search Results

Contextual Info: 10 MHz, Four-Quadrant Multiplier/Divider AD734 FUNCTIONAL BLOCK DIAGRAM FEATURES AD734 X1 X = X1 – X2 XIF X2 HIGH ACCURACY TRANSLINEAR CORE DD DENOMINATOR CONTROL U U0 U1 XZ U XY ÷ U – Z + WIF W – ∞ AO ER RU U2 Y1 YIF Y = Y1 – Y 2 Z = Z1 – Z2

scr inverter schematic circuit

Abstract: at89C5122D-RDTUM AT89C5122D AT89C5122D-ALRUM WT4 smd AT89C5122D-RDRUM 4202F at89C5122D-ALTUM SCR 106 B AT83R5122
Contextual Info: Features • Clock Controller • • • • • • • • • • • • – 80C51 core with 6 clocks per instruction – 8 MHz On-Chip Oscillator – PLL for generating clock to supply CPU core, USB and Smart Card Interfaces – Programmable CPU clock from 500 KHz / X1 to 48 MHz / X1

ad534 application

Abstract: AD734 similar of AD534 R31MA1 AD734BNZ AD534 AD734AQ AD734BQ RMS-to-DC Converter DC to 500 MHz RMS-to-DC Converter
Contextual Info: 10 MHz, Four-Quadrant Multiplier/Divider AD734 FEATURES FUNCTIONAL BLOCK DIAGRAM AD734 X1 X2 X = X1 – X2 XIF HIGH ACCURACY TRANSLINEAR CORE DD U0 DENOMINATOR CONTROL U1 U2 Y1 Y2 U XZ U XY ÷ U – Z + WIF W – ∞ AO ER RU YIF Y = Y1 – Y 2 Z = Z1 – Z2

Contextual Info: LE AVAILAB DS1302 Trickle-Charge Timekeeping Chip FEATURES PIN CONFIGURATIONS VCC2 1 X1 2 X2 3 GND 4 DS1302 TOP VIEW 8 VCC1 7 SCLK 6 I/O 5 CE DIP 300 mils VCC2 1 X1 2 X2 3 GND 4 DS1302 Real-Time Clock Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the

AT89C5122D

Abstract: gsm coding in c for 8051 microcontroller VQFP64 at89C5122D-RDTUM THX 201 transistor WT4 transistor WT6 WT21 WT4 smd 80C51
Contextual Info: Features • Clock Controller • • • • • • • • • • • • – 80C51 core with 6 clocks per instruction – 8 MHz On-Chip Oscillator – PLL for generating clock to supply CPU core, USB and Smart Card Interfaces – Programmable CPU clock from 500 KHz / X1 to 48 MHz / X1

AT89C5122D

Abstract: WT7 SMD A14N
Contextual Info: Features • Clock Controller • • • • • • • • • • • • – 80C51 core with 6 clocks per instruction – 8 MHz On-Chip Oscillator – PLL for generating clock to supply CPU core, USB and Smart Card Interfaces – Programmable CPU clock from 500 KHz / X1 to 48 MHz / X1

WT4 smd

Abstract: scr 151 automatic room power controller using scr 10uH coil THX 201 AT8XC5123 SCR Gate Drive for ac to dc converter THx 208 AT89C51RD2 PROGRAMMER dps 8000
Contextual Info: Features • Clock Controller • • • • • • • • • • • • – 80C51 core with 6 clocks per instruction – 8 MHz On-Chip Oscillator – PLL for generating clock to supply CPU core, USB and Smart Card Interfaces – Programmable CPU clock from 500 KHz / X1 to 48 MHz / X1

AT8XC5122D

Abstract: schematic diagram scart to usb dps 8000 AT89C5122D 80C51 AT83C5122 AT83C5123 AT83EC5122 AT85C5122 AT89C5122
Contextual Info: Features • Clock Controller • • • • • • • • • • • • – 80C51 core with 6 clocks per instruction – 8 MHz On-Chip Oscillator – PLL for generating clock to supply CPU core, USB and Smart Card Interfaces – Programmable CPU clock from 500 KHz / X1 to 48 MHz / X1

Quartz Crystal 32.768KHz

Abstract: DS1202 DS1302 DS1302N DS1302S DS1302S-16 DS1302SN DS1302SN-16 DS1302Z DS1302ZN
Contextual Info: DS1302 Trickle-Charge Timekeeping Chip www.maxim-ic.com FEATURES § § § § § § TOP VIEW TEMP RANGE PIN-PACKAGE 8 VCC1 X1 2 7 SCLK X2 3 6 I/O GND 4 5 CE DS1302 1 DIP 300 mils VCC2 1 X1 2 X2 3 GND 4 8 VCC1 7 SCLK 6 I/O 5 CE SO (200 mils/150 mils) ORDERING INFORMATION

M0C3022

Abstract: M0C3021 M0C3023 H22L BPW 56 photo H11FI H74AI H11M4 21ab H2482
Contextual Info: Quick-Reference Product Guide Selection Charts INFRARED EMITTERS TYPE NO. y & 54A S Ä j f # / 54 / JV V / jL & s /s s /^ s ^ 1 N 6 26 4 1N 6 26 S 1 N6266 CQ X 1 4 CQ X1 5 CQX16 CQ X1 7 FSD1 FSD 2 FSD3 F5E1 FSE2 F5E3 F5F1 F5G1 IE D 5 5 C L ED S5 B LED56 L ED SSC F

4Mx1

Abstract: CA211 EDI414096C a719 A109 amplifier
Contextual Info: ^EDI _ 4Mx1 Dynamic RAM CMOS, Monolithic The EDI414096C is a high performance, low power CMOS Dynamic RAM organized as 4Megabits x1. The use of four-layer poly process, combined with silicide technology and a single transistor dynamic storage cell,

IMX1 X1

Abstract: MARKING CODE 3fi UMX1N X1
Contextual Info: UMX1N X1 Transistor, dual, NPN Features • available in UMT6 UM6 and SMT6 (IMD, SC-74) packages Dimensions (Units : mm) • package marking: UMX1N and IMX1 ; X1 • package contains two independent NPN transistors (2SC2412K) • same size as UMT3 (UMT, SC-70)

APM 7328

Abstract: yr92 SST25VF040A 82576NS RTL 8189 0x3a18 82576EB ms 7254 ver 1.1 INTEL application notes op amp 741 model hSpice
Contextual Info: Intel 82576EB Gigabit Ethernet Controller Datasheet LAN Access Division LAD PRODUCT FEATURES Virtualization Ready External Interfaces  PCIe* v2.0 (2.5 GT/s) x4/x2/x1; called PCIe in this document  MDI (Copper) standard IEEE 802.3 Ethernet interface

Contextual Info: Intel 82576EB Gigabit Ethernet Controller Datasheet LAN Access Division LAD PRODUCT FEATURES Virtualization Ready External Interfaces  PCIe* v2.0 (2.5 GT/s) x4/x2/x1; called PCIe in this document  MDI (Copper) standard IEEE 802.3 Ethernet interface

intel 82576

Abstract: MLT 22 542 motherboard schematics diagram lga intel 945 motherboard schematic diagram foxconn 36 12f 575 Intel 82437 MOTHERBOARD pcb CIRCUIT diagram 686 8086 intel Programmers Reference Manual type w21 8222 - E
Contextual Info: Intel 82576 Gigabit Ethernet Controller Datasheet LAN Access Division LAD PRODUCT FEATURES Virtualization Ready External Interfaces  PCIe* v2.0 (2.5 GT/s) x4/x2/x1; called PCIe in this document  MDI (Copper) standard IEEE 802.3 Ethernet interface

RJMG

Abstract: 8224 intel 0x150F 82580 nec 2501 RTL 8189 JFM38U1 laser diode specification sheet 81210 0x35A
Contextual Info: Intel 82580 Quad/Dual Gigabit Ethernet LAN Controller Datasheet LAN Access Division LAD FEATURES External Interfaces Provided: • Virtualization Ready: PCIe v2.0 (5Gbps and 2.5Gbps) x4/x2/x1; called PCIe in this document. • Enhanced VMDq1 support: •

82580EB

Contextual Info: Intel 82580EB/82580DB Gigabit Ethernet Controller Datasheet LAN Access Division LAD FEATURES External Interfaces Provided: • PCIe v2.0 (5Gbps and 2.5Gbps) x4/x2/x1; called PCIe in this document. • MDI (Copper) standard IEEE 802.3 Ethernet interface for

Contextual Info: ^EDI _EDI411024C Electronic Detlgns Inc. High Performance Megabit Monolithic DRAM 1Mx1 Dynamic RAM CMOS, Monolithic Features The EDI411024C is a high performance, low power CMOS Dynamic RAM organized as 1Megabit x1. The use of triple-layer polysilicon process, combined with

Contextual Info: moi _ EDI414096C Electronic Detigns me. High Performance Four Megabit Monolithic DRAM 4Mx1 Dynamic RAM CMOS, Monolithic The EDI414096C is a high performance, low power CMOS Dynamic RAM organized as 4Megabits x1. The use of four-layer poly process, combined with silicide

Contextual Info: O K I semiconductor MSM51C256_ 262,144 WORD X1-BITS DYNAMIC RAM GENERAL DESCRIPTION The MSM51C256 is a new generation dynamic RAM organized as 262,144 words by 1 bit. The technology used to fabricate the MSM51C256 is OKI's CMOS silicon gate process technology. The

Contextual Info: Intel Ethernet Controller I350 Datasheet LAN Access Division LAD Features External Interfaces provided: Power saving features:  PCIe v2.1 (2.5GT/s and 5GT/s) x4/x2/x1; called PCIe in this document.  MDI (Copper) standard IEEE 802.3 Ethernet interface for

1117 1.8v

Abstract: TAG J3 136D diode 10-16 BLD 135D intel 945 motherboard schematic diagram transistor mps 9632 intel 82576 SFP 1-by-2 sdp31 ENCODER "Development Kit"
Contextual Info: Intel Ethernet Controller I350 Datasheet LAN Access Division LAD Features External Interfaces provided: Power saving features:  PCIe v2.1 (2.5GT/s and 5GT/s) x4/x2/x1; called PCIe in this document.  MDI (Copper) standard IEEE 802.3 Ethernet interface for

Contextual Info: Intel Ethernet Controller I350 Datasheet LAN Access Division LAD Features External Interfaces provided: Power saving features:  PCIe v2.1 (2.5GT/s and 5GT/s) x4/x2/x1; called PCIe in this document.  MDI (Copper) standard IEEE 802.3 Ethernet interface for

Contextual Info: DA1855A High-performance 100 MHz Differential Amplifier Features and Benefits • Full control from oscilloscope through ProBus interface • DC to 100 MHz bandwidth • Outstanding 100,000: 1 Common Mode Rejection Ratio CMRR • Gain of X1 or X10 • Industry-leading overdrive