WRITE LED Search Results

Contextual Info: AT28HC64B Features • • • • • • • • • • • Fast Read Access Time - 55 ns Automatic Page Write Operation Internal Address and Data Latches for 64-Bytes Fast Write Cycle Times Page Write Cycle Time: 10 ms Maximum 1 to 64-Byte Page Write Operation

AVR 8515 microcontroller

Abstract: 0932C ATMEL EEPROM 256 0932C-AVR-09 AT90S1200 AVR100
Contextual Info: AVR100: Accessing the EEPROM Features • Random Read/Write • Sequential Read/Write • Runable Test/Example Program Introduction This application note contains routines for access of the EEPROM memory in the AVR Microcontroller. Two types of Read/Write access has been implemented:

AT34C02

Contextual Info: Features Permanent Software Write Protection for the First-half of the Array - Software Procedure to Verify Write Protect Status Hardware Write Protection for the Entire Array Low-voltage and Standard-voltage Operation - 5.0 Vcc = 4.5V to 5.5V - 2.7 (Vcc = 2.7V to 5.5V)

Contextual Info: 24C01A/02A/04A M ic ro c h ip 1K/2K/4K 5.0V CMOS Serial EEPROMs PACKAGE TYPE FEATURES DIP Low power CMOS technology Hardware write protect Two wire serial interface bus, PC compatible 5 volt only operation Self-timed write cycle including auto-erase Page-write buffer

Contextual Info: ISSI IS61SF632A 32K x 32 SYNCHRONOUS FLOW-THROUGH FAST STATIC RAM FEATURES • Fast access time: 9 ns, 10 ns • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Pentium or linear burst sequence control

mt3351

Abstract: Cyrix 486 dx2 MT332 cyrix 486 Port70H 18L15 intel 486 dx4 386 MOTHERBOARD 82c597 cx486
Contextual Info: PRELIMINARY CYPRESS Features • 160-Pin single chip PQFP • Supports PC/AT compatible systems at 25/33/40/50 MHz • Supports AMD, Cyrix level 1 write­ back CPU • Write-Back/Write-Through cache with 32KB/64KB/128KB/256KB/512KB/ 1MB cache size • Non-cachable memory range support

Contextual Info: IS61ZB6432 m 64K x 32 SYNCHRONOUS STATIC RAM ZERO TURNAROUND BUS AND PIPELINE ADVANCE FEATURES • Fast access time: - 5 ns-100 MHz; 6 ns-83 MHz; - 7 ns-75 MHz; 8 ns-66 MHz • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control

PIC16F877 Bootloader

Abstract: diode cc 3053 pic16f877 usart assembly code example PIC16F870 max232 1F42 pic16f876 usart assembly code example AN732 cc 3053 PIC16F876 asm programs p16F877.inc file
Contextual Info: AN732 Implementing a Bootloader for the PIC16F87X Author: OPERATION Mike Garbutt Microchip Technology Inc. INTRODUCTION The PIC16F87X family of microcontrollers has the ability to write to their own program memory. This feature allows a small bootloader program to receive and write

M48T59

Abstract: M48T59Y SOH28
Contextual Info: M48T59 M48T59Y 64Kb 8K x 8 TIMEKEEPER SRAM INTEGRATED ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT and BATTERY FREQUENCY TEST OUTPUT for REAL TIME CLOCK AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES

Contextual Info: ISSI IS24C01_ 1024-BIT SERIAL ELECTRICALLY ERASABLE PROM ADVANCE INFORMATION APRIL 1998 FEATURES OVERVIEW • Low power CMOS — Active current less than 2 mA — Standby current less than 8 fiA • Hardware write protection — Write control pin

NC-10H

Abstract: WG A8 6D 03 Z WG A8 6D 03 R NC-2H K7Z163685A-HC25 K7Z167285A K7Z167285A-HC25 WG A5 6D 25 Z
Contextual Info: K7Z167285A K7Z163685A 512Kx36 & 256Kx72 DLW Double Late Write RAM Document Title 512Kx36 & 256Kx72 DLW(Double Late Write) RAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Nov. 2, 2000 Preliminary 0.1 1. Preliminary Mar. 30, 2001

CM2022

Contextual Info: CM202-2 2. PIN CONNECTIONS PIN 1 2 3 4 5 6 7 to 14 15 16 SYMBOL GND Vdd V0 RS R/W E DB0 to DB7 LEDA LEDK SIGNAL DESCRIPTION Ground. Power Supply for Logic. Operating Voltage for LCD. Register Select. H: Data Code Input; L: Instruction Code Input. Read/Write. H: Read Operation; L: Write Operation

AVR109

Abstract: AVRPROG AVRB161 cstartup.s90 AVR109 Self Programming Flash AVR035 avr programming in c atmel 504 eeprom AVR0
Contextual Info: AVR109: Self-programming Features • AVR109 Code Fits in All AVR Microcontrollers with Boot Block • Read and Write Both Flash and EEPROM Memories • Uses the AVRProg Protocol • Read and Write Lock Bits Introduction This application note describes how an

Contextual Info: RISC CPU WRITE BUFFER IDT79R3020 €>' In te g ra te d D evice Technology, In c. FEATURES: DESCRIPTION: • Temporary storage buffers to enhance the performance of the IDT79R3000 RISC CPU processor • Allows for write operations by the RISC CPU processor

K7Z163688B

Abstract: K7Z167288B WG A8 6D 03 Z WG A8 6D 05 Z
Contextual Info: K7Z167288B K7Z163688B Preliminary 512Kx36 & 256Kx72 DLW Double Late Write RAM Document Title 512Kx36 & 256Kx72 DLW(Double Late Write) RAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Feb. 10, 2003 Preliminary 0.1 1. Correct the ZQ to programmable.

intel 80386SL

Abstract: 82360SL 386SL CCD MTBF W 20 K85 LH28F008SAT-K85 8AAD
Contextual Info: SHARP 1 LHF08S17 - CONTENTS 1 FEATURES 2 2 PRODUCT OVERVIEW 3 3 PRINCIPLES OF OPERATION 4 BUS OPERATION 9 5 COMMAND DEFINITIONS 11 6 EXTENDED BLOCK ERASE/BYTE WRITE CYCLING 7 AUTOMATED BYTE WRITE 13 8 AUTOMATED BLOCK ERASE 13 9 DESIGN CONSIDERATIONS .

25x16

Abstract: AN404 ST24 ST24C16 ST24W16 ST25C16 ST25W16
Contextual Info: ST24C16, ST25C16 ST24W16, ST25W16 16 Kbit 2Kb x8 Serial EEPROM • 1 MILLION ERASE/WRITE CYCLES, with 40 YEARS DATA RETENTION ■ SINGLE SUPPLY VOLTAGE: - 4.5V to 5.5V for ST24x16 versions - 2.5V to 5.5V for ST25x16 versions ■ HARDWARE WRITE CONTROL VERSIONS:

256X512

Contextual Info: Preliminary CAT24WC128 128K-Bit Serial CMOS E2PROM FEATURES • 400 KHz l2C Bus Compatible* ■ 1.8 to 6 Volt Operation ■ Commercial, Industrial and Automotive Tern perature Ranges ■ Low Power CMOS Technology ■ Write Protect Feature ■ 64-Byte Page Write Buffer

Contextual Info: Preliminary CAT24WC128 128K-Bit Serial CMOS E2PROM FEATURES • 1MHz l2C Bus Compatible* ■ 1.8 to 6 Volt Operation ■ Commercial, Industrial and Automotive Tern perature Ranges ■ Low Power CMOS Technology ■ Write Protect Feature ■ 64-Byte Page Write Buffer

ACM-2X8

Abstract: voice module interface with 8051 JP24 eprom memory interface 8051 14 pin single in line connector FlexRom
Contextual Info: TechTools ACM-2X8 Active Cable Module - Dual 8 bit Target Interface EPROM/FLASH Select - JP24 for JP23 D8-15 EPROM/FLASH Select - JP21 for JP20 (D0-7) 1 Write Line 1 Write Line FLASH FLASH EPROM EPROM FLASH FLASH EPROM Target Cable Connector - JP20 / JP23

Contextual Info: NM24C65 65,536-Bit Standard 2-Wire Bus Interface Serial EEPROM with Write Protect SEM ICONDUCTOR TM NM24C65 65,536-Bit Standard 2-Wire Bus Interface Serial EEPROM with Write Protect General Description: Features: The NM 24C 65/C65L/C65LZ devices are 65,536 bits of CMOS

Contextual Info: Preliminary CAT24WC128 128K-Bit Serial CMOS E2PROM FEATURES • 400 KHz l2C Bus Compatible* ■ 1.8 to 6 Volt Operation ■ Commercial, Industrial and Automotive Tem ­ perature Ranges ■ Low Power CMOS Technology ■ Write Protect Feature ■ 64-Byte Page Write Buffer

Contextual Info: M2201 2-Wires 1 Kbit x8 Serial EEPROM • TWO WIRE SERIAL INTERFACE ■ 100.000 ERASE/WRITE CYCLES with 100 YEARS DATA RETENTION at 55°C ■ SINGLE SUPPLY VOLTAGE: - 4.5V to 5.5V for M2201 version - 2.7V to 5.5V for M2201V version ■ HARDWARE WRITE CONTROL

A0416

Contextual Info: IS24C01 W 1024-BIT SERIAL ELECTRICALLY ERASABLE PROM M ADVANCE INFORMATION APRIL 1998 OVERVIEW FEATURES • Low power CMOS — Active current less than 2 mA — Standby current less than 8 |aA • Hardware write protection — Write control pin • Internally organized as128 x 8