W256 Search Results

ddr5

Abstract: 0.1 uf Ceramic Capacitors t3d diode ILB1206 W256
Contextual Info: Preliminary W256 12 Output Buffer for 2 DDR and 3 SDRAM DIMMS • Space-saving 28-pin SSOP package Features Functional Description • One input to 12 output buffer/drivers • Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS • One additional output for feedback

Contextual Info: OLED SPECIFICATION Model No: EA W25664-XCLG 1.General Specification Item Dimension Unit Dot Matrix Module dimension 256 x 64 Dots 87.4x28.5×2.22 mm － mm Active Area 79.089×19.756 (mm) mm Pixel Size 0.289×0.289 (mm) mm Pixel Pitch 0.309×0.309 (mm)

Contextual Info: PRELIMINARY W256 12 Output Buffer for 2 DDR or 3 SDRAM DIMMS Features Functional Description • One input to 12 output buffer/driver • Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS • One additional output for feedback • SMBus interface for individual output control

Contextual Info: W256 12 Output Buffer for 2 DDR and 3 SRAM DIMMS Features Functional Description • One input to 12 output buffer/drivers • Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS • One additional output for feedback • SMBus interface for individual output control

CYW256OXCT

Abstract: DDR 333 CYW256OXC ILB1206 W256 W256H W256HT w250
Contextual Info: W256 12 Output Buffer for 2 DDR and 3 SRAM DIMMS Features Functional Description • One input to 12 output buffer/drivers • Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS • One additional output for feedback • SMBus interface for individual output control

Contextual Info: PRELIMINARY W256 12 Output Buffer for 2 DDR and 3 SDRAM DIMMS Features Functional Description • One input to 12 output buffer/drivers • Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS • One additional output for feedback • SMBus interface for individual output control

CYW256OXC

Abstract: ILB1206 W256 W256H W256HT
Contextual Info: W256 12 Output Buffer for 2 DDR and 3 SRAM DIMMS Features Functional Description • One input to 12 output buffer/drivers • Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS • One additional output for feedback • SMBus interface for individual output control

W256

Abstract: DFT-16 NM6403 W2565 FFT-256
Contextual Info: Организация параллельных вычислений в алгоритмах БПФ на процессоре NM6403 Кашкаров В.А., Мушкаев С.В. НТЦ “Модуль”, г. Москва Изучаются возможности параллельных вычислений в алгоритмах быстрого преобразования Фурье. Исследуется

Contextual Info: SN74ACT7805 256 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS201B – MARCH 1991 – REVISED APRIL 1998 D D D D D D D D D D D D D Member of the Texas Instruments Widebus Family Free-Running Read and Write Clocks Can Be Asynchronous or Coincident Read and Write Operations Synchronized

Contextual Info: SN74ALVC7805 256 x 18 LOW-POWER CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS593A – OCTOBER 1997 – REVISED APRIL 1998 D D D D D D D D D D D D D Member of the Texas Instruments Widebus Family Low-Power Advanced CMOS Technology Operates From 3-V to 3.6-V VCC

Contextual Info: SN54ABT7819 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SGBS305D – AUGUST 1994 – REVISED APRIL 1998 D D D D D D D Member of the Texas Instruments Widebus Family Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident

Contextual Info: SN54ABT7819 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SGBS305D – AUGUST 1994 – REVISED APRIL 1998 D D D D D D D Member of the Texas Instruments Widebus Family Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident

pin diagram of 7804

Abstract: SN74ACT7804 SN74ACT7806 SN74ACT7814 SN74ALVC7804 SN74ALVC7806 SN74ALVC7814 vw64
Contextual Info: SN74ALVC7804, SN74ALVC7806, SN74ALVC7814 5 1 2 x 18, 2 5 6 x 1 8 , 6 4 x 18 FIRST-IN, FIRST-OUT MEMORIES S C AS 437-JU N E 1994 DL PACKAGE TOP VIEW RESET I 1 56 OE 55 Q 17 2 D 16 3 54 Q16 D 15 4 53 Q 15 D 14 5 52 GND D 13 6 51 Q 14 D12 7 50 D11 8 49 Vcc

ALVC7804-25

Abstract: ALVC7804-40 SN74ACT7804 SN74ALVC7804 W256
Contextual Info: SN74ALVC7804 512 x 18 FIRST-IN, FIRST-OUT MEMORY SCAS432 – JANUARY 1995 • • • • • • • • • • Operates at 3-V to 3.6-V VCC Load Clock and Unload Clock Can Be Asynchronous or Coincident Low-Power Advanced CMOS Technology Full, Empty, and Half-Full Flags

Contextual Info: C200H-MC221 Motion Control Unit Operation Manual: Details Revised January 1999 iv Notice: OMRON products are manufactured for use according to proper procedures by a qualified operator and only for the purposes described in this manual. The following conventions are used to indicate and classify precautions in this manual. Always heed

SN74ACT7803

Abstract: SN74ACT7805 SN74ACT7813 W130 W256
Contextual Info: SN74ACT7805 256 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS201 – MARCH 1991 – REVISED APRIL 1992 • • • • • • • • • • • • • Member of the Texas Instruments Widebus  Family Free-Running Read and Write Clocks Can Be Asynchronous or Coincident

SN74ACT7804

Abstract: SN74ACT7806 SN74ACT7814 W130 W255 W256
Contextual Info: SN74ACT7806 256 x 18 STROBED FIRST-IN, FIRST-OUT MEMORY SCAS438A – APRIL 1992 – REVISED SEPTEMBER 1995 D D D D D D D D D D D Member of the Texas Instruments Widebus  Family Load Clock and Unload Clock Can Be Asynchronous or Coincident 256 Words by 18 Bits

fet W256

Abstract: FW256 W256
Contextual Info: W256 Ordering number : ENN7756 N-Channel Silicon MOSFET W256 General-Purpose Switching Device Applications Features • • • • For DC / DC converters, Motor drives, Inverters. Low ON-resistance. Ultrahigh-speed switching. 4V drive. Specifications Absolute Maximum Ratings at Ta=25°C

SN74ACT7803

Abstract: SN74ACT7805 SN74ACT7813 W130 W256
Contextual Info: SN74ACT7805 256 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS201B – MARCH 1991 – REVISED APRIL 1998 D D D D D D D D D D D D D Member of the Texas Instruments Widebus Family Free-Running Read and Write Clocks Can Be Asynchronous or Coincident Read and Write Operations Synchronized

Contextual Info: SN74ABT7819A 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCBS756 – MAY 2002 D D D D D D Member of the Texas Instruments Widebus Family Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Read and Write Operations Synchronized

Contextual Info: SN54ABT7819 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SGBS305D – AUGUST 1994 – REVISED APRIL 1998 D D D D D D D Member of the Texas Instruments Widebus Family Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident

SN74ABT7819A

Abstract: W256
Contextual Info: SN74ABT7819A 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCBS756 – MAY 2002 D D D D D D Member of the Texas Instruments Widebus Family Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Read and Write Operations Synchronized

SN74ACT7803

Abstract: SN74ACT7805 SN74ACT7813 SN74ALVC7805 W130 W256
Contextual Info: SN74ALVC7805 256 x 18 LOW-POWER CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS593A – OCTOBER 1997 – REVISED APRIL 1998 D D D D D D D D D D D D D Member of the Texas Instruments Widebus Family Low-Power Advanced CMOS Technology Operates From 3-V to 3.6-V VCC

Contextual Info: SN54ABT7819 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SGBS305D – AUGUST 1994 – REVISED APRIL 1998 D D D D D D D Member of the Texas Instruments Widebus Family Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident