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    Renesas Electronics Corporation 74LV2G00AUSE-E

    Logic IC NAND Gate 2 Element 1.8V, 2.5V, 3.3V, 5V 8-SOP T/R
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    Rochester Electronics 74LV2G00AUSE-E 3,000 1
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    Renesas Electronics Corporation LV2G00AUSE-E-P

    Logic IC NAND Gate 2 Element 1.8V, 2.5V, 3.3V, 5V 8-SOP
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    Rochester Electronics LV2G00AUSE-E-P 66,000 1
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    STMicroelectronics 74V2G00STR

    NAND Gate, 74V Series, 2-Func, 2-Input, CMOS, PDSO8
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    Vyrian 74V2G00STR 8,280
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    Vyrian 74V2G00CTR 4,386
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    V2G00 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Marking code V7

    Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


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    74lvc2g00marking code v7 PDF

    74LVC2G00

    Abstract: 74LVC2G00DC 74LVC2G00DP 74LVC2G00GD 74LVC2G00GM 74LVC2G00GT
    Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 08 — 26 October 2009 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


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    74lvc2g0074lvc2g00dc74lvc2g00dp74lvc2g00gd+274lvc2g00gm74lvc2g00gt PDF

    74V2G00

    Contextual Info: V2G00 DUAL 2-INPUT NAND GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


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    74v2g00ot23-8lot323-8l74v2g00str+274v2g00ctrv2g00 PDF

    Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 12 — 8 April 2013 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


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    74lvc2g00 PDF

    74V2G00

    Abstract: 74V2G00STR
    Contextual Info: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


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    74v2g00v2g00ot23-8lot323-8l+174v2g00str PDF

    74V2G00

    Abstract: V2G00 74V2G00CTR 74V2G00STR
    Contextual Info: V2G00 DUAL 2-INPUT NAND GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


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    74v2g00v2g00ot23-pecifications74v2g00ctr+174v2g00str PDF

    74V2G00STR

    Abstract: 74V2G00 "NAND Gate"
    Contextual Info: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


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    74v2g00v2g00ot23-8l74v2g00str+1nand gate PDF

    Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


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    74lvc2g00 PDF

    Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 10 — 30 November 2011 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


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    74lvc2g00 PDF

    74LVC2G00

    Abstract: 74LVC2G00DC 74LVC2G00DP 74LVC2G00GD 74LVC2G00GM 74LVC2G00GT sot1089 V2G00
    Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 09 — 8 June 2010 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


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    74lvc2g0074lvc2g00dc74lvc2g00dp74lvc2g00gd+474lvc2g00gm74lvc2g00gtsot1089v2g00 PDF

    74V2G00

    Abstract: 74V2G00STR V2G00
    Contextual Info: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


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    74v2g00v2g00ot23-8l74v2g00str PDF

    74V2G00

    Contextual Info: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN)


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    74v2g00v2g00 PDF