UPA12 Search Results

of TX6A RX6A

Abstract: RX6A tx2c transmitter RX6a 1211 TX1B TXC-06885 diode GFP AA tx6c TX5b rx5b Ethernet over SONET mapper
Contextual Info: Envoy -CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast Ethernet ports with extended buffers or 1 Gigabit Ethernet port (10/100/1000 Mbits/s)

STP5111

Contextual Info: S un M ic r o e l e c t r o n ic s July 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.

UltraSPARC ii

Abstract: PI-275 UltraSPARC IIIi
Contextual Info: S un M icroelectronics July 1997 FFB DATASHEET High Performance UPA Based 24-bit Frame Buffer D e s c r ip t io n The Fast Frame Buffer FFB is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output

ups circuit diagram using idvr

Contextual Info: Spansion Analog and Microcontroller Products The following document contains information on Spansion analog and microcontroller products. Although the document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion

Contextual Info: STP5110A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC -! CPU Module DATA SHEET 167 MHz UltraSPARC-I + 0.5 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-I m odule is a high perform ance, SPARC V9 com pliant, small form factor processor module,

Contextual Info: SME5222AUPA-400 microsystems Ju ly 1999 _ UltraSPARC -!! CPU Module DATASHEET 400 MHz CPU, 2.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC™ -II, 400 M H z CPU, 2.0 M byte E-cache module, SM E5222AUPA-400 , delivers high perfor­

Contextual Info: STP5111A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-I m odule is a high perform ance, SPARC V9 com pliant, small form factor processor module,

MC100LVE111

Abstract: SPARC v9 architecture BLOCK DIAGRAM
Contextual Info: STP5110A July 1997 UltraSPARC -I CPU Module DATA SHEET 167 MHz UltraSPARC-I + 0.5 MB E-Cache + UDBs DESCRIPTION The UltraSPARC-I module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.

BY575

Abstract: 28BZ 8 PINS J-354W display 16119
Contextual Info: 501-4126 3D 501-4127 (2D) July 1997 FFB DATA SHEET High Performance UPA Based 24-bit Frame Buffer DESCRIPTION The Fast Frame Buffer (FFB) is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output

fujitsu mb90f

Abstract: upc 2851 v bnt 801 v1.1 MB90F DN-13 bnt 801 K 2232 DC-06 c914 MB90F378
Contextual Info: Corporate names revised in the documents The Fujitsu Limited reorganized its LSI business into a wholly owned subsidiary, the Fujitsu Microelectronics Limited on March 21, 2008. The corporate names “Fujitsu” and “Fujitsu Limited” described all in this document have been

Contextual Info: FUJITSU MICROELECTRONICS DATA SHEET DS07-13729-2E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90370 Series MB90372/F372/V370 • DESCRIPTION The MB90370 series is a line of general-purpose, 16-bit microcontrollers designed for those applications which

Display 7 segment DA05

Abstract: 5up1 Display 7 segment DA04 MB90372 TH 4300 C/R TWT d1111 P8273 3DU1 da05 7 segments SC st Duplex adapter
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET Version 1.3 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90370 Series MB90372/F372/V370 DESCRIPTION The MB90370 series is a line of general-purpose, 16-bit microcontrollers designed for those applications which require high-speed real-time processing. The instruction set is designed to be optimized for controller applications

SPARC v9 architecture BLOCK DIAGRAM

Abstract: UltraSPARC ii sparc sparc v7 STP1031LGA Sinak h30
Contextual Info: STP1031 July 1997 UltraSPARC -II DATA SHEET Second Generation SPARC v9 64-Bit Microprocessor With VIS DESCRIPTION The STP1031, UltraSPARC–II, is a high-performance, highly-integrated superscalar processor implementing the SPARC-V9 64-bit RISC architecture. The STP1031 is capable of sustaining the execution of up to four

upa64

Abstract: UPA128 STP221
Contextual Info: S un M icroelectronics July 1997 u se Uniprocessor System Controller DATA SHEET D e s c r ip t io n The Uniprocessor System Controller USC has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.

64KX1

Contextual Info: STP5111A July 1997 UltraSPARC -I CPU Module DATA SHEET 200 MHz UltraSPARC-I + 1 MB E-Cache + UDBs DESCRIPTION The UltraSPARC-I module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.

dc05 7 segments

Abstract: Display 7 segment DC05 Display 7 segment DA05 LB4 bridge diode dc05 7 DISPLAY segments DN11 UPA12 F2MC-16LX LQFP-144 MB90370
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS07-13729-1E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90370/375 Series MB90372/F372/F377/V370 • DESCRIPTION The MB90370/375 series is a line of general-purpose, 16-bit microcontrollers designed for those applications

TX1C/TX2C

Contextual Info: TM Envoy-CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW TXC-06885-MB, Ed. 3 August 2004 FEATURES APPLICATIONS • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast

TXC06880BROG

Abstract: TXC-06880BIOG TXC-06880 TXC-06880-MB txc06880biog CHN 612 diode CHN 615 TranSwitch TXC-06880BIOG TX4B chn G4 210
Contextual Info: TM Envoy-CE2 Device SPI-3 to Ethernet Controller TXC-06880 DATA SHEET TXC-06880-MB, Ed. 5 July 2006 FEATURES APPLICATIONS • 2 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbit/s), 2 Fast Ethernet

TXC-06885BIOG

Abstract: TXC-06885BrOG TXC-06885 gdtx diode GFP AA TX2C B TX4B CMAC 1553 RX6a 1211 txc-0688
Contextual Info: TM Envoy-CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRELIMINARY TXC-06885-MB, Ed. 6A February 2005 FEATURES APPLICATIONS • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbit/s), 2 Fast Ethernet

rx6a

Abstract: TX4B diode GFP AA RX6a 1211 TX7A TX-4C customer provisioning TX5b rx5b OC-3 Ethernet over SONET Mapper tx2c rx2c
Contextual Info: Envoy -CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast Ethernet ports with extended buffers or 1 Gigabit Ethernet port (10/100/1000 Mbits/s)

Contextual Info: SME5222UPA-400 microsystems May 1999 _ UltraSPARC -!! CPU Module DATASHEET 400 MHz CPU, 2.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC™ -II, 400 M H z CPU, 2.0 M byte E-cache module, SM E5222UPA-400 , delivers high perfor­ m ance com puting in a com pact design. Based on the UltraSPARC™ -II CPU, this m odule is designed using a

Contextual Info: microsystems M ay 1999 UltraSPARC“-II CPU Module DATASHEET 400 MHz CPU, 4.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC -II, 400 M H z CPU, 4.0 M byte module, SM E5224UPA-400 delivers high perform ance com puting in a com pact design. Based on the UltraSPARC™ II CPU, this m odule is designed using a small

DAC-IC8BC

Abstract: ads-835 ADM-14B mv-1606 AM-6210 ADS-835A ADS-835B SHM-IC-1 AM552 SHM-363
Contextual Info: DDÄTEL Customer Price List Effective April, 1997 IN N O V A T IO N a n d E X C E L L E N C E Prices in U.S. Dollars ORDERING GUIDE This ordering guide is presented as a procedural guide. For a formal statement o f policies, refer to the TERMS AND CONDITIONS OF SALE found on the Quotation form or on the Customer Acknowledgement copy o f the Sales Order.

of TX6A RX6A

Contextual Info: TM Envoy-CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET TXC-06885-MB, Ed. 7 January 2007 FEATURES APPLICATIONS • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbit/s), 2 Fast Ethernet