UC 36 REV B Search Results

Contextual Info: PTFA181001E PTFA181001F Thermally-Enhanced High Power RF LDMOS FETs 100 W, 1805 – 1880 MHz Description ue 25 IM3 -38 tin 20 -43 15 -48 10 ACPR -53 34 36 38 40 42 44 t od Broadband internal matching d 30 Drain Efficiency % Efficiency Thermally-enhanced packages

R11C4

Contextual Info: 35.0-45.0 GHz GaAs MMIC Receiver March 2005 - Rev 01-Mar-05 Sub-harmonic Receiver Integrated LNA, LO Doubler/Buffer, Image Reject Mixer +3.0 dBm Input Third Order Intercept +2.0 dBm LO Drive Level 4.0 dB Noise Figure 18.0 dB Image Rejection 100% On-Wafer RF, DC Testing and Noise Figure Testing

Contextual Info: PTFA210701E PTFA210701F Confidential, Limited Internal Distribution Thermally-Enhanced High Power RF LDMOS FET 70 W, 2110 – 2170 MHz Description 25 IM3 -45 20 tin ACPR -50 15 -55 -60 30 32 34 36 38 40 42 t uc • Broadband internal matching • Typical two-carrier WCDMA performance at

CY7C66013C

Abstract: CY7C66113C
Contextual Info: CY7C66013C CY7C66113C Full-Speed USB 12 Mbps Peripheral Controller with Integrated Hub Full-Speed USB (12 Mbps) Peripheral Controller with Integrated Hub Cypress Semiconductor Corporation Document #: 38-08024 Rev. *B • 198 Champion Court • San Jose, CA 95134-1709

pHEMT transistor 30GHz

Abstract: 29MPA0373 84-1LMI
Contextual Info: 26.0-31.0 GHz GaAs MMIC Power Amplifier May 2005 - Rev 05-May-05 29MPA0373 Features Chip Device Layout tio n Balanced Design Provides Good Output Match On-Chip Temperature Compensated Output Power Detector 32.0 dB Small Signal Gain +36.0 dBm Third Order Intercept OIP3

27TRX0357

Abstract: 84-1LMI usb transmitter schematic diagram
Contextual Info: 27.0-36.0 GHz GaAs MMIC Transmitter 27TRX0357 Chip Device Layout May 2005 - Rev 20-May-05 Features tio n Sub-harmonic Transmitter Integrated IR Mixer, LO Buffer & Output Amplifier +20.0 dBm Output Third Order Intercept OIP3 2.0 dBm LO Drive Level 20.0 dB Image Rejection, 9.0 dB Conversion Gain

STM32F107VCT

Abstract: MC306-G-06Q-32.768 STM32F107VCT6 B563S-8850-U006 TS8121C stm32f107 usb/micro SD socket MC306-g-06q STM32-MICRIUM STM32F107* Micrium
Contextual Info: UM0780 User Manual STM32-MICRIUM evaluation board for MICRIUM operating system Introduction The STM32-MICRIUM evaluation board is a complete development platform for STMicroelectronic's ARM Cortex -M3 core-based microcontroller with full-speed USBOTG, Ethernet MAC, two channels of CAN2.0A/B compliant interface, two I2S channels, two

P1003

Abstract: R10VD1 84-1LMI XP1003 TRANSISTOR RF P1003 R300 diodes
Contextual Info: 27.0-35.0 GHz GaAs MMIC Power Amplifier May 2005 - Rev 05-May-05 P1003 Features Chip Device Layout tio n Balanced Design Provides Good Input/Output Match On-Chip Temperature Compensated Output Power Detector 15.0 dB Small Signal Gain +34.0 dBm Third Order Intercept OIP3

R10VD1

Abstract: XP1003 P1003 R300 diodes
Contextual Info: 27.0-35.0 GHz GaAs MMIC Power Amplifier May 2005 - Rev 05-May-05 P1003 Features Chip Device Layout tio n Balanced Design Provides Good Input/Output Match On-Chip Temperature Compensated Output Power Detector 15.0 dB Small Signal Gain +34.0 dBm Third Order Intercept OIP3

S-35399A02

Contextual Info: S-35399A02 2-WIRE REAL-TIME CLOCK www.sii-ic.com Rev.2.0_00 Seiko Instruments Inc., 2007-2010 PR OD UC T The S-35399A02 is a CMOS 2-wire real-time clock IC which operates with the very low current consumption and in the wide range of operation voltage. The operation voltage is 1.3 V to 5.5 V so that this IC can be used for various power supplies from

xPC560B

Abstract: MPC5604B anp mpc5604 AN3836SW headlight AN23 AN24 AN25 lamp light bulb an3836
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3836 Rev. 2 8/2009 Advanced Headlights Control and Diagnostics Using the Cross-Triggering Unit between PWM and ADC Channels on MPC560xB/C Microcontrollers by: Petr Cholasta Roznov CSC, Czech Republic, EMEA

Contextual Info: CY7C64013C CY7C64113C Full-Speed USB 12-Mbps Function Full-Speed USB (12-Mbps) Function Features • Full-speed USB Microcontroller ■ 8-bit USB Optimized Microcontroller ❐ Harvard architecture ❐ 6-MHz external clock source ❐ 12-MHz internal CPU clock

180 Degree hybrid

Contextual Info: 20.0-38.0 GHz GaAs MMIC Balanced Mixer August 2005 - Rev 04-Aug-05 26BAM0545 Features Chip Device Layout tio n Fundamental Balanced Mixer 8.0 dB Conversion Loss +25.0 dBm Input Third Order Intercept IIP3 35.0 dB LO to RF Isolation 100% On-Wafer RF Testing

26BAM0545

Abstract: 84-1LMI 180 Degree hybrid
Contextual Info: 20.0-38.0 GHz GaAs MMIC Balanced Mixer November 2005 - Rev 21-Nov-05 26BAM0545 Features Chip Device Layout tio n Fundamental Balanced Mixer 8.0 dB Conversion Loss +25.0 dBm Input Third Order Intercept IIP3 35.0 dB LO to RF Isolation 100% On-Wafer RF Testing

Contextual Info: 7 DRAWING MADE THIS IN THIRD DRAWING ANGLE 15 6 5 UNPUBLI5HED COPYRIGHT 19 RELEASED BY AMP FOR PUBLICATION INCORPORATED. ALL 4 <3> PROJECTION 3 2 INTERNATIONAL RIGHTS DI ST LOC 19 REV I 5 I0N5 00 GP RESERVED. LTR ZONE D E S C R I R T I ON REV PER EC 051 3 - 0 1 0 1 - 0 1

44MPA0478

Abstract: 84-1LMI
Contextual Info: 43.5-46.5 GHz GaAs MMIC Power Amplifier 44MPA0478 April 2005 - Rev 01-Apr-05 Features Chip Device Layout tio n Excellent Saturated Output Stage Balanced Design Provides Good Input/Output Match 14.0 dB Small Signal Gain +29 dBm P1dB Compression Point 100% On-Wafer RF, DC and Output Power Testing

CY7C65013

Abstract: CY7C65013-PVC CY7C65113
Contextual Info: ber 7, Y7C65013 CY7C65013 CY7C65113 CY7C65013 CY7C65113 USB Hub with Microcontroller Cypress Semiconductor Corporation Document #: 38-08002 Rev. * • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised September 7, 2001 CY7C65013 CY7C65113

inductance R600

Contextual Info: 21.2-23.6 GHz GaAs MMIC Transmitter March 2005 - Rev 01-Mar-05 Features Chip Device Layout tio n Sub-harmonic Transmitter Integrated IR Mixer, LO Buffer & Output Amplifier +20.0 dBm Output Third Order Intercept OIP3 2.0 dBm LO Drive Level 15.0 dB Image Rejection

38-08027

Abstract: CY7C63XXX
Contextual Info: CY7C63413C CY7C63513C CY7C63613C Low-Speed High Input/Output 1.5-Mbps USB Controller Features Functional Overview • USB Specification compliance ❐ Conforms to USB Specification, Versions 1.1 and 2.0 ❐ Conforms to USB HID Specification, Version 1.1 ❐ Supports one device address and three data endpoints

xilinx FPGA IIR Filter

Abstract: PQ208C xilinx logicore fifo generator 6.2 FPGA implementation of IIR Filter digital volume control AD27 AD29 AD30 FPGA based implementation of fixed point IIR Filter Xilinx XC4000 PCMCIA
Contextual Info: Fall 1996 Seminar LogiCoreTM Solutions LogiCore is a trademark of Xilinx Inc. Fall Seminars - LogiCore - 1 LogiCore Solutions Introduction LogiCore PCI - FPGA Industry’s Most Successful Core FPGA Based DSP - It’s About Time Reference Designs Fall Seminars - LogiCore - 2

Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-08028 Spec Title: CY7C63221, CY7C63231A ENCORE TM USB LOW-SPEED USB PERIPHERAL CONTROLLER Sunset Owner: Nelson Zhang (NXZ) Replaced by: NONE CY7C63221, CY7C63231A enCoRe USB Low-Speed USB Peripheral Controller ❐ 1 Features

30MPA0562

Abstract: 84-1LMI ka-band transistor
Contextual Info: 28.0-31.0 GHz GaAs MMIC Power Amplifier August 2005 - Rev 04-Aug-05 30MPA0562 Features Chip Device Layout tio n Ka-Band 1 W Power Amplifier 27.0 dB Small Signal Gain +30.0 dBm Saturated Output Power 100% On-Wafer RF, DC and Output Power Testing 100% Visual Inspection to MIL-STD-883

Contextual Info: HB52R1289E2U-A6B/B6B Description L EO 1 GB Registered SDRAM DIMM 128-Mword x 72-bit, 100 MHz Memory Bus, 2-Bank Module 36 pcs of 64 M × 4 Components PC100 SDRAM E0016H10 (1st edition) (Previous ADE-203-1194A (Z) Preliminary Jan. 30, 2001 uc od Pr The HB52R1289E2U belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been

Contextual Info: HB52R649E1U-A6B/B6B Description L EO 512 MB Registered SDRAM DIMM 64-Mword x 72-bit, 100 MHz Memory Bus, 1-Bank Module 18 pcs of 64 M × 4 Components PC100 SDRAM E0022H10 (1st edition) (Previous ADE-203-1192A (Z) Preliminary Jan. 31, 2001 uc od Pr The HB52R649E1U belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed