TYRT Search Results

Contextual Info: SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS D3043, AUGUST 1987 - • • • Low Skew between Devices . . . 6 ns Max • Low Supply Current Requirements 30 mA Max • Individual Driver and Receiver I/O pins with Dual Vcc arid Dual GND C 2

maa723

Abstract: Katalog tesla tranzistor MA748CN MAA725 Tesla MAC 156 MAA501 TESLA MA 7805 MAA436 MA7812 MA7815
Contextual Info: T U E g f f l M A ELEKTRONICKÉ SOUCÁSTKY KONCERN R O ZN O V Analogové integrované obvody PRO VSEOBECNÉ POUZITÍ Svazek A KONSTRUKCNl KATALOG POLOVODICOVŸCH SOUCASTEK KONSTRUKCNÍ KATALOG ELEKTRONICKŸCH SOUCÁSTEK HUA A n a lo g o v é in te g r o v a n é

TA 7698 AP

Contextual Info: PRELIMINARY INFORMATION L9D3256M32SBG1 L9D3512M32SBG1 8-16 Gb, DDR3, 256-512M x 32 Single Channel Memory Module Benefits FEATURES " " " " " " Configuration: "‚"N;F5478O54UDI3<"54Ogi"z"54"z" 8 banks ‚"N;F5734O54UDI3<"86Ogi"z"54"z" 8 banks DDR3 Integrated Module [iMOD]:

cl 5403

Contextual Info: SN5403, SN54LS03, SN54S03, SN7403 SN74LS03 SN74S03 QUADRUPLE 2 INPUT POSITIVE-NANO GATES WITH OPEN-COLLECTOR OUTPUTS DECEMBER 1983-REVISED MARCH 1988 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic

74ALS689

Contextual Info: SN54ALS688, SN54ALS689, SN74ALS688, SN74ALS689 8-BIT IDENTITY COMPARATORS D 2 6 6 1 , JUNE 1 9 8 2 - Compares Two Eight-Bit Words REVISED M A Y 1 9 8 6 S N 5 4 A LS 688, S N 54A LS 689 . . . J PACKAGE S N 7 4 A L S 6 8 8 , S N 7 4 A L S 6 8 9 . . . D W OR N PACKAGE

SN54ALS112A

Abstract: SN74 SN74ALS112A
Contextual Info: SN54ALS112A, SN74ALS112A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , A P R IL 1 9 8 2 — R E V IS E D M A Y 1 9 8 6 • Fully Buffered to Offer Maxim um Isolation from External Disturbance • Package Options Include Plastic "Sm all

tms4464

Abstract: TMS4464-12NL DRAM 14590 SMJ4464 DQ1-DQ41
Contextual Info: SMJ4464 65,536 WORD BY 4 BIT DYNAMIC RANDOM ACCESS MEMORY SEPTEMBER 1987 - REVISED NOVEMBER 1989 6 5 ,5 3 6 x 4 Organization JD PACKAGE TOP VIEW Single 5-V Supply (1 0 % Tolerance) K JEDEC Standardized Pinout Pinout Identical to S M J 4 4 1 6 {16K Dynamic RAM)

SN76496

Abstract: SN76489 SN76496A SN76494 76494 SN76489A noise generator TYRT 76496 SN76494A
Contextual Info: SN76494, SN76494A, SN76496, SN76496A PROGRAMMABLE TONE/NOISE GENERATOR D2801, JUNE 1964-REVISED JANUARY 1989 • Each Circuit Contains 3 Programmable Tone Generators DUAL-IN LINE P A C K A G E TOP VIEW • Programmable Whlte-Noise Generator D2 £ • Programmable Attenuation

bjsl

Abstract: als867 synchronous counter using 4 flip flip SN54AS867 SN54AS869 SN74ALS867A SN74ALS869 SN74AS867 SN74AS869 723 hc
Contextual Info: SN74ALS867A. SN74AS867, SN74ALS869, SN74AS869 SN54AS867, SN54AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS D2661, DECEMBER 1982 - REVISED JU N E 1988 S N 54' . . . JT PACKAG E S N 7 4 ' . . . D W OR N T PA C K A G E Fully Programmable with Synchronous Counting and Loading

j6920

Abstract: CY7C600
Contextual Info: CYPRESS SEMICONDUCTOR MbE D O SSÔTbbS □□□bLf33 S Z I CYP v CYPRESS -­ SEMICONDUCTOR CY7C157A 16,384 x 16 Static R/W Cache Storage Unit Features Ebnctional Description • Optimized for use with RISC proces­ sors, Including SPARC • Address and WE registers

SN74ALS244A

Contextual Info: 3 ^ 1 7 2 3 0063115 4 5SE D TEXAS INSTR LOGIC SNS4ALS244A, SN54AS244, SN74ALS244A, SN74AS244 T ' 62 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D2661, DECEMBER 1982-REVISED MAY 1986 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

Contextual Info: TEXAS INSTR LOGIC 2SE 0 • 6^1=1723 Q O M H Q b 2 ■ / SN54ALS758, SN54AS758, SN54AS759 SN74ALS758, SN74AS758, SN74AS759 QUADRUPLE BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS D2910. DECEMBER 1983-REVISED MAY 1986 S N 5 4 ' . . . J PACKAGE S N 7 4 ' . . . D OR N P A C K A G E

Contextual Info: SN54F352, SN74F352 DUAL 4-LINE TO 1-LINE DATA SELECTORSIMULTIPLEXERS D2932, MARCH 1987 —REVISED JANUARY 1989 S N 54F352 . . . J PACKAGE SN74F352 . . . D OR N PACKAGE • ■ • Inverting Versions of SN54F153 and SN74F153 I * Permits Multiplexing from N Lines to 1 Line

Contextual Info: L9D364M64SBG2 4.0 Gb, DDR3, 64 M x 64 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: "‚"XDD?XDDS?307X"ø"20297X ‚"307X"egpvgt/vgtokpcvgf."rwuj1rwnn" K1Q " ‚"Rcemcig<"38oo"z"44oo"z"304oo." 35"z"43"ocvtkz"y1"493dcnnu " ‚"Ocvtkz"dcnn"rkvej<"3022oo

75183

Abstract: D1292
Contextual Info: 0^1724 TEXAS INSTR 0 0 f l 2 3 3 ci Q B T im T M GE LIN /IN TFC ' 7 5 - ^ 5 '0 7 SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS D1292, OCTOBER 1972-REVISED SEPTEMBER 1986 SN 5S183 . . . J PACKAGE SN 7S183 . . . D, J , OR N PACKAGE Single 5-V Supply

Contextual Info: PRELIMINARY INFORMATION L9D3256M32DBG2 L9D3512M32DBG2 16-32 Gb, DDR3, 256-512M x 32 Dual Channel Memory Module Benefits FEATURES DDR3 Integrated Module [iMOD]: "‚"XDD?XDDS?3057X"/202897X1-203X ‚"3057X"egpvgt/vgtokpcvgf."rwuj1rwnn" K1Q " ‚"Rcemcig<"38oo"z"44oo"z"304oo."

RT 1603

Abstract: B03 marking SF1601PT SF1603PT
Contextual Info: E SF1601PT -SF1608PT TAIWAN SEMICONDUCTOR 16.0 AMPS. Glass Passivated Super Fast Rectifiers tò RoHS IQ -3P/I-Q -24ZAD C O M P L IA N C E y tit* _ I-ii».- n' «».w. I ¿ 5ÏT> | m Features <r D u a l re c tifie r c o n s tru c tio n . p o s itiv e c e n le r - ta p

d3s55

Abstract: SN74AS304 7828S 7520B "Clock Drivers"
Contextual Info: SN74AS304 OCTAL DIVIDE-BY-2 CIRCUITS/CLOCK DRIVERS D 3555. JU LY 1990 Maximum Output Skew of 1 ns D OR N PACKAGE TOP VIEW Maximum Pulse Skew of 1 ns Q3[ Q4[ GND[ GND[ GND[ 1 U 2 3 4 5 Q5[ 6 Q6[ 7 Q7[ 8 Center-PIn V qc and GND Configurations to Minimize High-Speed Switching Noise

7MBR50SA060

Abstract: D005
Contextual Info: This m a te ria l and tha Inform ation herein It the p roperty of the third express written Co„ L td . purposes w ith o u t consent of Fuji Electric party,nor used or the m anu facturing Fuji Electric CoJ.id,"They shall be neither reproduced, c o p ie d

54hc4066

Abstract: TLC4066 d2922 CD4066A MC54/74HC4066 TLC4066I PLZ14 SN54HC4066 SWITCH11
Contextual Info: SN 54H C4066, TLC4066I SILICON GATE CMOS QUADRUPLE BILATERAL ANALOG SW ITCH D2922, JAN U AR Y 1986 SN&4HC4066 . . . J OR N PACKAGE TLC4066I . . . D OR N PACKAGE High D eg ree o f Linearity High O n -O ff O u tp ut V o lta g e Ratio TOP VIEW L o w C ro s s ta lk B e tw e e n S w it c h e s

SN7401

Abstract: National Semiconductor 4045 transistor bf 175 74ALS569 74AS1008 SN7449 SN74ALS244A SN54ALS1000A SN74ALS519 SN54ALS27
Contextual Info: GENERAL INFORMATION ORDERING INSTRUCTIONS AND MECHANICAL DATA FUNCTIONAL INDEX/SELECTION GUIDE PRODUCT GUIDE ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS PROGRAMMABLE LOGIC ARRAYS BETA PRODUCTS EXPLANATION OF NEW LOGIC SYMBOLS CONNECTOR AND KEYBOARD PRODUCTS

Contextual Info: PRELIMINARY INFORMATION L9D3256M72SBG2 L9D3256M80SBG2 18-20 Gb, DDR3, 256 M x 72/80 Integrated Module Benefits FEATURES DDR3 Integrated Module [iMOD]: "‚"XDD?XDDS?3057X"ø"20297X ‚"3057X"egpvgt/vgtokpcvgf."rwuj1rwnn" K1Q " ‚"Rcemcig<"38oo"z"44oo"z"304oo."

1251C

Contextual Info: — 156 — / ¿ P G 1 0 0 B 50MHz A‘ f,3GHz i X'irii& m Ìim & M co GaAs T + o X IC T", ? - ; o if Ty-rtc ¿'iofftitiF ^f-j>ciLTK6. F c c = -5 V ± 0 .5 V o * j * .50M Hz~3GHz oJtrr-iSISc.2.7dB typ at50M H z~3G H z

Contextual Info: SN74ALS169B, SN74AS169A SN54ALS169B, SN54AS169A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS MARCH 1984, REVISED OCTOBER 1991 Fully Synchronous Operation for Counting and Programming S N 5 4 A L S ', S N 6 4 A S S N 7 4 A L S '. S N 7 4 A S . . . J PACKAG E O OR N PA C K A G E