TT 105 N 12 Search Results

EUPEC TT 105 N 12

Abstract: EUPEC TT 105 N 14
Contextual Info: EUPE.C L IE ¡D • 34032=17 0 0 D1 D7 H Hfib « U P E C TT 105 N, TD 105 N, DT105N Elektrische Eigenschaften Electrical properties Höchstzulässige Werte Maximum rated values Periodische Vorwärts- und Rückwärts-Spitzensperrspannung repetitive peak forward off-state

Contextual Info: PM8313 D3MX DATA SHEET ISSUE 5 M13 MULTIPLEXER :2 0: 43 PM PMC-920702 5N Th ur sd ay ,2 D3MX ov em be r, 20 04 01 PM8313 ISSUE 5: JULY 1998 Do wn lo ad ed by C on te n tT ea m of Pa r tm in er In co n M13 MULTIPLEXER PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

2edg-gb-5.08

Contextual Info: A DEGSON r- DEGSON ELECTRONICS CO., LTD. % m M m R mM: SS # M2.5 t t f f f t . f£ $ PA66. UL94V-0 14 : H £ : %n ii m 300V 15A 20m Q 5000MQ /DC 1000V AC2000V/1 Min 28-12AWG 2.5mm! a s fe ll: ÎÎM fc P I w ^ tt lg ;S Jt & IS = ffl « -40°C~+105°C 0.4N m 3.6lb.in

5252 F 1006

Abstract: 40r6 NF 846 RFT service-mitteilungen "service-mitteilungen" vqe 21 RFT Servicemitteilungen servicemitteilungen service-mitteilungen 5252 f 1201
Contextual Info: SERVICE-MITTEILUNGEN 12-15 Iradio - television VEB RFT INDUSTRIEVERTRIEB RUNDFUNK UND F E R N S E H E N Ausgabe Seite S e p t. 88 1- 3 16 M itte ilu n g aus dem VEB S te r n -B a d io B e r l in , K u n d en d ien st Laufw erk MU 3oo S-DB - S e r v ic e v a r ia n te n

TRANSISTOR D400 data sheet download

Abstract: TRANSISTOR D400 transistor D400 switch diagram application k225 transistor D400 circuit diagram application LFBGA144 TQFP100 TQFP144 D400 transistor data K949
Contextual Info: STR73xF ARM7TDMI 32-bit MCU with Flash, 3x CAN, 4 UARTs, 20 timers, ADC, 12 comm. interfaces • Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz ■ Temperature range -40 to 105 °C ■ Memories – Up to 256 Kbytes FLASH program memory 10,000 cycles endurance, data retention

STR730

Abstract: LFBGA144 TQFP100 TQFP144
Contextual Info: STR73xF ARM7TDMI 32-BIT MCU WITH FLASH, 3x CAN, 4 UARTs, 20 TIMERS, ADC, 12 COMM. INTERFACES • ■ ■ ■ ■ ■ Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz Temperature Range – Operating temperature range -40 to 105 °C Memories – Up to 256 Kbytes FLASH program memory

Contextual Info: STR73xF ARM7TDMI 32-BIT MCU WITH FLASH, 3x CAN, 4 UARTs, 20 TIMERS, ADC, 12 COMM. INTERFACES PRELIMINARY DATA • ■ ■ ■ ■ ■ Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz Temperature Range – Operating temperature range -40 to 105 °C

TRANSISTOR D400

Abstract: LFBGA144 TQFP100 TQFP144
Contextual Info: STR73xF ARM7TDMI 32-bit MCU with Flash, 3x CAN, 4 UARTs, 20 timers, ADC, 12 comm. interfaces • Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz ■ Memories – Up to 256 Kbytes FLASH program memory 10,000 cycles endurance, data retention 20 years @ 85° C

Contextual Info: Approval sheet Low Profile Series TT MULTILAYER CERAMIC CAPACITORS Low Profile Series 0402 to 1210 Sizes X7R, X5R & Y5V Dielectrics RoHS Compliance *Contents in this sheet are subject to change without prior notice. Page 1 of 9 ASC_ Low Profile_(TT)_009P_AS

Contextual Info: Approval sheet Low Profile Series TT MULTILAYER CERAMIC CAPACITORS Low Profile Series 0402 to 1210 Sizes X7R, X5R & Y5V Dielectrics RoHS Compliance *Contents in this sheet are subject to change without prior notice. Page 1 of 9 ASC_ Low Profile_(TT)_009O_AS

Contextual Info: Approval sheet Low Profile Series TT MULTILAYER CERAMIC CAPACITORS Low Profile Series 0603 to 1210 Sizes X7R, X5R & Y5V Dielectrics RoHS Compliance *Contents in this sheet are subject to change without prior notice. Page 1 of 9 ASC_Low Profile_(TT)_009J_DS

TRANSISTOR D400

Abstract: transistor D400 pin diagram application LFBGA144 diode 107 10K STR73x TQFP100 TQFP144 STR731FV0T6 STR730FZ1H6 K1153
Contextual Info: STR73xF ARM7TDMI 32-bit MCU with Flash, 3x CAN, 4 UARTs, 20 timers, ADC, 12 comm. interfaces • Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz ■ Memories – Up to 256 Kbytes FLASH program memory 10,000 cycles endurance, data retention 20 years @ 85° C

WUP30

Abstract: TQFP144 WUP28 transistor D400 circuit diagram application WUP23 STR735 K1153 transistor D400 WUP24 transistor D400 pin diagram application
Contextual Info: STR73xF ARM7TDMI 32-BIT MCU WITH FLASH, 3x CAN, 4 UARTs, 20 TIMERS, ADC, 12 COMM. INTERFACES DATA BRIEF • ■ ■ ■ ■ ■ Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz Temperature Range – Operating temperature range -40 to 105 °C Memories

009k

Abstract: MLCC 22uF 16V X5R 10 1206
Contextual Info: Approval sheet Low Profile Series TT MULTILAYER CERAMIC CAPACITORS Low Profile Series 0603 to 1210 Sizes X7R, X5R & Y5V Dielectrics RoHS Compliance *Contents in this sheet are subject to change without prior notice. Page 1 of 9 ASC_ Low Profile_(TT)_009K_AS

Contextual Info: A DEGSON ELECTRONICS CO., LTD. DEGSON r- M m R % m m M: * i / 2E D G -STD 2E D G -S T D -5.08 M 2.5 tt £ tt 14 : SS # : PA66. UL94V-0 % H ií m 300V 15A 20m Q 5000M O/DC1000V AC2000V/1 Min 28-12AWG 2.5mm! a s fe ll: w« tt m -40°C~+105°C 0.4N m (3.6lb.in

Contextual Info: Approval sheet Low Profile Series TT MULTILAYER CERAMIC CAPACITORS Low Profile Series 0402 to 1210 Sizes X7R, X5R & Y5V Dielectrics RoHS Compliance *Contents in this sheet are subject to change without prior notice. Page 1 of 9 ASC_ Low Profile_(TT)_009K_AS

Contextual Info: CM74CB218 Preliminary LSB 2x8 Data Sheet 40 AM A member of the PMC CLK Family 7: Low-Voltage Low-Skew Dual 1-to-8 Buffer 20 The CM74CB218 is packaged in a space-saving 28-pin SSOP package. 04 12 :4 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to

Contextual Info: Approval sheet Low Profile Series TT MULTILAYER CERAMIC CAPACITORS Low Profile Series 0402 to 1210 Sizes X7R, X5R & Y5V Dielectrics RoHS Compliance *Contents in this sheet are subject to change without prior notice. Page 1 of 8 ASC_ Low Profile_(TT)_009M_AS

Contextual Info: STR73xFxx ARM7TDMI 32-bit MCU with Flash, 3x CAN, 4 UARTs, 20 timers, ADC, 12 comm. interfaces Features • ■ ■ ■ ■ Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz Memories – Up to 256 Kbytes Flash program memory 10,000 cycles endurance, data retention

Contextual Info: 1/2" DIAMETER/10-TURN/W IREW OUND AND HYBRITRON ELEMENT • Servo mount ■ Small diameter ■ Excellent resolution ■ High rotational life ■ Non-standard features and specifications available bo—ms FOR ORDERING INFORMATION SEE PAGE 120. Model 3750/3751

Contextual Info: 19-3955; Rev 4; 4/12 KIT ATION EVALU E L B A AVAIL 27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer Features ♦ Preemphasis Improves Eye Diagram and Signal Integrity at the Output ♦ Proprietary Data Encoding for DC Balance and Reduced EMI ♦ Control Data Sent During Video Blanking

Contextual Info: 19-3955; Rev 4; 4/12 KIT ATION EVALU E L B A AVAIL 27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer Features ♦ Preemphasis Improves Eye Diagram and Signal Integrity at the Output ♦ Proprietary Data Encoding for DC Balance and Reduced EMI ♦ Control Data Sent During Video Blanking

Hitachi DSA002745

Contextual Info: HM5164405A Series HM5165405A Series 16777216-word x 4-bit Dynamic RAM ADE-203-459A Z Rev. 1.0 Sep. 12, 1997 Description The Hitachi HM5164405A Series, HM5165405A Series are CMOS dynamic RAMs organized 16,777,216word × 4-bit. They employ the most advanced CMOS technology for high performance and low power.

Contextual Info: CM74CB218 Preliminary LSB 2x8 Data Sheet 12 AM A member of the PMC CLK Family 2: Low-Voltage Low-Skew Dual 1-to-8 Buffer 5 02 :3 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to