TSPC603 Search Results

TSPC603E

Abstract: CQFP240 CQFP 240 CBGA255 2-CQFP G38-87 603E Thomson P1149
Contextual Info: TSPC603E PowerPC 603e RISC MICROPROCESSOR Family PID6-603e Specification DESCRIPTION The PID6-603e implementation of PC603e after named 603e is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC family. The 603e

tc 3086

Abstract: CQFP 240 Thomson-CSF PC603E PC603 THOMSON-CSF PRODUCTS
Contextual Info: TSPC603e with inverted leads PowerPC 603e RISC MICROPROCESSOR Family PID6-603e Specification DESCRIPTION The PID6-603e implementation of PC603e after named 603e is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC family. The 603e

marking code DL20

Abstract: X0010 fdn 156 TSPC2605 THOMSON-CSF PRODUCTS
Contextual Info: TSPC2605 INTEGRATED SECONDARY CACHE MODULE FOR PowerPCt MICROPROCESSORS DESCRIPTION The TSPC2605 is a single chip, 256KB integrated look–aside cache with copy–back capability designed for PowerPC applications TSPC603e . Using 0.38 µm technology along

emcp

Abstract: Tag 225 600 replacement PC603R TSPC603R thomson-csf tantalum capacitors PowerPC+603r+RISC+Microprocessor+Manual
Contextual Info: TSPC603R PowerPC 603e RISC MICROPROCESSOR Family PID7t-603e Specification DESCRIPTION The PID7t-603e implementation of PowerPC603e after named 603r is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC family. The 603r implements 32-bit effective addresses, integer data types of 8, 16 and 32 bits, and floating-point data types

PowerPC603r

Contextual Info: cteurs spécifiques TSPC603R PowerPC 603e RISC MICROPROCESSOR Family PID7t-603e Specification DESCRIPTION The PID7t-603e implementation of PowerPC603e after named 603r is a iow-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC™

CQFP 240

Abstract: 2-CQFP PC603P T08 3421
Contextual Info: TSPC603p PowerPC 603e RISC MICROPROCESSOR Family PID7v-603e Specification DESCRIPTION The PID7v-603e implementation of PowerPC603e after named 603p is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC family. The 603p implements 32-bit effective addresses, integer data types of 8, 16 and 32 bits, and floating-point data types

TSPC603R

Abstract: microprocessor LNM80 DH21
Contextual Info: TSPC603R PowerPC 603e RISC Microprocessor Family PID7t-603e Datasheet Features • • • • • • • Superscalar 3 Instructions per Clock Peak Dual 16 KB Caches Selectable Bus Clock 32-bit Compatibility PowerPC Implementation On-chip Debug Support

Contextual Info: TSPC603R in PQFP package PowerPC 603e RISC MICROPROCESSOR Family PID7t-603e Specification DESCRIPTION The PID7t-603e implementation of PowerPC603e after named 603r is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC

CQFP 240

Abstract: CQFP240 j12 ir G38-87 CBGA255 CQFP24
Contextual Info: TSPC603P PowerPC 603e RISC MICROPROCESSOR Family PID7v-603e Specification DESCRIPTION The PID7v-603e implementation of PowerPC603e after named 603p is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC family. The 603p implements 32-bit effective addresses, integer data types of 8, 16 and 32 bits, and floating-point data types

emcp

Abstract: JEDEC JESD51-8 BGA CI-CGA-255
Contextual Info: TSPC603R PowerPC 603e RISC Microprocessor Family PID7t-603e Datasheet Features • • • • • • • Superscalar 3 Instructions per Clock Peak Dual 16 KB Caches Selectable Bus Clock 32-bit Compatibility PowerPC Implementation On-chip Debug Support

microprocessor

Abstract: G172
Contextual Info: PC755/745 PowerPC 755/745 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745)

0828H

Contextual Info: PC755/745 PowerPC 755/745 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745)

Contextual Info: TSPC932 LOW VOLTAGE PLL CLOCK DRIVER DESCRIPTION The TSPC932 is a 3.3V compatible TTL based clock driver device targetted for zero delay applications. The device provides 6 outputs for driving clock loads plus a single feedback clock output. The dedicated feedback output gives the user six

sandisk micro sd

Abstract: digital clock using at89s52 microcontroller stepper motor control with avr application notes sandisk micro sd card pin configuration vhdl code for rs232 receiver STK 435 power amplifier Microcontroller AT89S52 vhdl code for ofdm Microcontroller AT89S52 40 pin fingerprint scanner circuit
Contextual Info: Atmel Corporation Atmel Operations Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 1 408 441-0311 FAX 1 (408) 487-2600 Memory 2325 Orchard Parkway San Jose, CA 95131 TEL 1 (408) 441-0311 FAX 1 (408) 436-4314 Regional Headquarters Microcontrollers

2138F

Abstract: CBGA360 MPC7400 PC745 PC755 ATMEL 745 PCX755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

hall sensor u18 032

Abstract: CBGA360 MPC7400 PC745B PC755B CBGA-255 atmel 0820 PowerPC755B
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755B 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745B) 733 MIPS at 400 MHz (PC755B) at 641 MIPS at 350 MHz (PC745B) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

TS68EN360VR25

Abstract: SMD MARKING CODE WE3 TS68EN360VA25 MC68302 TS68040 TS68302 TS68EN360 THOMSON-CSF PRODUCTS TSPC603
Contextual Info: TS68EN360 32:BIT QUAD INTEGRATED COMMUNICATION CONTROLLER DESCRIPTION The TS68EN360 QUad Integrated Communication Controller QUICCt is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in communications activities.

Contextual Info: TS88915T Low Skew CMOS PLL Clock Driver Tri-State 70 and 100 MHz Versions Datasheet Features • • • • • • • • • • • Vcc = 5V ± 5% Military Temperature Range Fully Compatible with the TS68040 Five Low Skew Outputs – Five Outputs Q0-Q4 with Output-to-Output Skew < 500 ps Each Being Phase End Frequency Locked to the SYNC Input

tspc2605

Abstract: TSPC932 class D 50w single power TSPC603 THOMSON-CSF PRODUCTS AN1091 MPC932 PC932
Contextual Info: TSPC932 LOW VOLTAGE PLL CLOCK DRIVER DESCRIPTION The TSPC932 is a 3.3V compatible TTL based clock driver device targetted for zero delay applications. The device provides 6 outputs for driving clock loads plus a single feedback clock output. The dedicated feedback output gives the user six

Contextual Info: Features • • • • • • • • • • • • • • • 12.4 SPECint95, 8.4 SPECfp95 at 266 MHz TSPC750A with 1 MB L2 at 133 MHz 11.5 SPECint95, 6.9 SPECfp95 at 266 MHz (TSPC740A) 488 MIPS at 266 MHz Selectable Bus Clock (11 CPU Bus Dividers up to 8x)

740P, 255 CBGA and CI-CGA packages

Abstract: ABB CONVERTER E4 CBGA360 ABB P6 cga motorola cbga 272 CI-CGA-255 740P
Contextual Info: Features H 12.4SPECint95,8.4SPECfp95 @266Mhz 750P w/1MB L2 @133Mhz H 13.5SPECint95, 9SPECfp95 @300Mhz (740P) H 488 MIPS @ 266Mhz H Selectable bus clock (11 CPU bus dividers up to 8x) H PD typical 4,2W @ 333Mhz, full operating conditions. H Nap, doze and sleep modes for power savings

MQUAD

Abstract: PowerPC-603e 603E
Contextual Info: Features H H H H H H H H 5.6 SPECint95, 4.0 SPECfp95 @ 200 MHz estimated Superscalar (3 instructions per clock peak). Dual 16KB caches. Selectable bus clock. 32-bit compatibility PowerPC implementation. On chip debug support. PD typical = 2.5 Watts (200 MHz), full operating conditions.

GSM module Interface with At89s52

Abstract: ATMEGA 16 AU dc motor control using ir remote by AT89C51 interface gps with AVR atmega128 SAM9733 servo motor atmega 12 volt dc motor speed control base on At89c51 "Radio Controlled Clock Receiver" ac motor AVR c source code for triac sam9793
Contextual Info: ATMEL PRODUCT GUIDE APRIL 2002 Atmel Corporation • 2325 Orchard Parkway • San Jose, CA 95131 TEL: 408 441-0311 • FAX: (408) 487-2600 Web Site: http://www.atmel.com Atmel’s Products Atmel Corporation is a worldwide leader in the design, manufacturing and marketing of advanced semiconductors,