TSLEW18 Search Results

LVCMOS15

Abstract: LVCMOS25 LVCMOS33 XAPP399 XAPP427 XC2C128 Xilinx XC2C128-7VQ100C
Contextual Info: R DS093 v2.9 June 28, 2005 XC2C128 CoolRunner-II CPLD Product Specification Features Description • The CoolRunner-II 128-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

vhdl code of floating point adder

Abstract: 11F32 AEC-Q100 LVCMOS15 LVCMOS25 LVCMOS33 XA2C128 XAPP427 XAPP399
Contextual Info: XA2C128 CoolRunner-II Automotive CPLD R DS554 v1.1 May 5, 2007 Features • AEC-Q100 device qualification and full PPAP support available in both I-grade and extended temperature Q-grade • Guaranteed to meet full electrical specifications over TA = -40° C to +105° C with TJ Maximum = +125° C

Contextual Info: R DS093 v2.8 April 21, 2005 XC2C128 CoolRunner-II CPLD Preliminary Product Specification Features Description • The CoolRunner-II 128-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

COOLRUNNER-II examples

Abstract: HSTL standards Signal Path Designer XAPP375
Contextual Info: Application Note: CoolRunner-II CPLD R Understanding the CoolRunner-II Timing Model XAPP375 v1.0 January 3, 2002 Summary This document describes the CoolRunner -II timing model. Understanding the CoolRunner-II timing model is essential to creating a CPLD design that meets the desired timing

XC2C512-10FTG256I

Abstract: LVCMOS15 LVCMOS25 LVCMOS33 XAPP399 XAPP427 XC2C512-7FTG256I xc2c512-10pqg208c
Contextual Info: XC2C512 CoolRunner-II CPLD R DS096 v3.2 March 8, 2007 Product Specification Features Description • The CoolRunner-II 512-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

XA2C128-8CPG132Q

Contextual Info: XA2C128 CoolRunner-II Automotive CPLD R DS554 v1.0 October 31, 2006 Features • • • • • • AEC-Q100 device qualification and full PPAP support available in both I-grade and extended temperature Q-grade Guaranteed to meet full electrical specifications over

XC2C128-7CPG132I

Abstract: XC2C128-7VQ100C Xilinx XC2C128-7VQ100C XC2C128-7CP132I XC2C128 LVCMOS15 LVCMOS25 LVCMOS33 XAPP399 XAPP427
Contextual Info: XC2C128 CoolRunner-II CPLD R DS093 v3.2 March 8, 2007 Product Specification Features Description • The CoolRunner-II 128-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

Xilinx XC2C128-7VQ100C

Abstract: XC2C128 DS093
Contextual Info: XC2C128 CoolRunner-II CPLD R DS093 v3.0 March 20, 2006 Product Specification Features Description • The CoolRunner-II 128-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

XA2C128-8CPG132Q

Abstract: XA2C128-7CPG132I AEC-Q100 LVCMOS15 LVCMOS25 LVCMOS33 XA2C128 XAPP427 XA2C128 "pin compatible"
Contextual Info: XA2C128 CoolRunner-II Automotive CPLD R DS554 v1.2 June 9, 2009 Features • • • • • • AEC-Q100 device qualification and full PPAP support available in both I-grade and extended temperature Q-grade Guaranteed to meet full electrical specifications over

COOLRUNNER-II examples

Abstract: XAPP375 HB 00173 DS090 MC16 Signal Path Designer x3751
Contextual Info: Application Note: CoolRunner-II CPLD R Understanding the CoolRunner-II Timing Model XAPP375 v1.5 February 28, 2003 Summary This document describes the CoolRunner -II timing model. Understanding the CoolRunner-II timing model is essential to creating a CPLD design that meets the desired timing