TL AND GATES Search Results

Contextual Info: INTEGRATED CIRCUITS DATA SHEET UBA2021 630 V driver IC for CFL and TL lamps Product specification File under Integrated Circuits, IC11 2000 Jul 24 Philips Semiconductors Product specification 630 V driver IC for CFL and TL lamps UBA2021 FEATURES GENERAL DESCRIPTION

UBA2021T

Abstract: UBA2021P philips cfl UBA2021 transistor smd CF rs
Contextual Info: INTEGRATED CIRCUITS DATA SHEET UBA2021 630 V driver IC for CFL and TL lamps Product specification Supersedes data of 2001 Jan 30 2002 Aug 02 Philips Semiconductors Product specification 630 V driver IC for CFL and TL lamps UBA2021 FEATURES GENERAL DESCRIPTION

UBA2021T

Abstract: UBA2021P UBA2021
Contextual Info: INTEGRATED CIRCUITS DATA SHEET UBA2021 630 V driver IC for CFL and TL lamps Product specification Supersedes data of 2000 Jul 24 File under Integrated Circuits, IC11 2001 Jan 30 Philips Semiconductors Product specification 630 V driver IC for CFL and TL lamps

UBA2021

Abstract: UBA2021T UBA2021P MO-001
Contextual Info: UBA2021 630 V driver IC for CFL and TL lamps Rev. 04 — 25 July 2008 Product data sheet 1. General description The UBA2021 is a high voltage IC intended to drive and control Compact Fluorescent Lamps CFL or fluorescent TL lamps. It contains a driver circuit for an external

Contextual Info: UBA2021 630 V driver IC for CFL and TL lamps Rev. 04 — 25 July 2008 Product data sheet 1. General description The UBA2021 is a high voltage IC intended to drive and control Compact Fluorescent Lamps CFL or fluorescent TL lamps. It contains a driver circuit for an external

MC9818

Abstract: MC880 MC908 MC9820 MC800 metal package case 601 MC988 MC908 motorola MC9814 mc9802
Contextual Info: INTEGRATED CIRCUITS G f lt S lf Q . MC800 Series 0 to +75°C MC900 Series {—55 to +125.°C) NEW M R TL A N D mW M RTL The new M R TL and m W M R T L 8 0 0 Series described in this selector quide are now designed to exceed both the old M C 700 and the old M C 800 Series

mc9818

Abstract: MC908 motorola MC908 MC880 MC906 BCD adder and subtractor MC800p mc905 MC988 MC913
Contextual Info: INTEGRATED CIRCUITS K K S ÏÏO . MC800 Series 0 to +75<>C MC900 Series ( - 5 5 to +125.°C) NEW M R TL AN D mW M RTL The new M R TL and m W M R T L 8 0 0 Series described in this selector quide are now designed to exceed both the old M C 700 and the old M C 800 Series

DM7411N

Abstract: 400X C1995 DM74 DM7411 N14A
Contextual Info: DM7411 Triple 3-Input AND Gate General Description This device contains three independent gates with three data inputs each which perform the logic AND function Connection Diagram Dual-In-Line Package TL F 9774 – 1 Order Number DM7411N NS Package Number N14A

DM74LS15N

Abstract: DM54LS15 DM54LS15J DM54LS15W DM74LS15 DM74LS15M J14A M14A N14A W14B
Contextual Info: DM54LS15 DM74LS15 Triple 3-Input AND Gate with Open-Collector Outputs General Description This device contains three independent gates each of which perform the logic AND function The outputs are open-collector Connection Diagram Dual-In-Line Package TL F 10167 – 1

max2719

Contextual Info: zn National aSfl Semiconductor DM7411 Triple 3-Input AND Gate General Description This device contains three independent gates with three data inputs each which perform the logic AND function. Connection Diagram Dual-ln-Line Package TL/F/9774-1 Order Number DM741 IN

F6454

Abstract: C1995 DM74 DM74S51 DM74S51N N14A
Contextual Info: DM74S51 Dual 2-Wide 2-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function Connection Diagram Dual-In-Line Package TL F 6454 – 1 Order Number DM74S51N

5451DMQB

Abstract: 5451FMQB DM74 DM7451 DM7451N J14A N14A W14B
Contextual Info: yWA National ÆlA Semiconductor 5451/DM7451 Dual 2-Wide, 2-Input AOI Gate General Description This device contains two independent combinations of gates, each of which perform the logic AND-OR-INVERT function. Connection Diagram Dual-in-Llne Package TL/F/9779-1

DM54S08

Abstract: C1995 DM54S08J DM54S08W DM74S08 DM74S08N J14A N14A W14B
Contextual Info: DM54S08 DM74S08 Quad 2-Input AND Gates General Description This device contains four independent gates each of which performs the logic AND function Connection Diagram Dual-In-Line Package TL F 6444 – 1 Order Number DM54S08J DM54S08W or DM74S08N See NS Package Number J14A N14A or W14B

deutsch abc

Abstract: DM74S11 DM74S11N TL AND Gates w14b C1995 DM54S11 DM54S11J DM54S11W J14A
Contextual Info: DM54S11 DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function Connection Diagram Dual-In-Line Package TL F 6447 – 1 Order Number DM54S11J DM54S11W or DM74S11N See NS Package Number J14A N14A or W14B

Contextual Info: S64 National Hit:Semiconductor DM54S64/DM74S64 4-Wide AND-OR-INVERT Gates General Description This device contains a combination of gates which performs the logic AND-OR-INVERT function. Connection Diagram Dual-ln-Line Package A E F G H I GNO TL/F/6455-1 Order Number DMS4S64J, DM54S64W or DM74S64N

TF1102

Abstract: dual j-k flip-flop with data lockout N41 250 PLS105 PLUS405-37 PLUS405-37A PLUS405-37N PLUS405-45 PLUS405-45A PLUS405-45N
Contextual Info: Philips Semiconductors Product specification Programmable logic sequencers 16 x 64 x 8 PLUS405-37/-45 DESCRIPTION • T TL com patible The PLUS405 devices are bipolar, program m able state machines of the Mealy type. Both the AND and the OR array are user-programm able. All 64 AND gates are connected to the 16

AND-OR-INVERT gate

Abstract: DM54LS54 DM54LS54J DM54LS54W DM74LS54 DM74LS54M DM74LS54N J14A M14A N14A
Contextual Info: DM54LS54 DM74LS54 4-WIDE 2-Input AND-OR-INVERT Gate General Description This device contains a combination of four two input AND gates whose outputs are connected to a four input NOR Gate Connection Diagram Dual-In-Line Package TL F 10173 – 1 Order Number DM54LS54J DM54LS54W DM74LS54M or DM74LS54N

W14B

Abstract: C1995 DM54S64 DM54S64J DM54S64W DM74S64 DM74S64N J14A N14A
Contextual Info: DM54S64 DM74S64 4-Wide AND-OR-INVERT Gates General Description This device contains a combination of gates which performs the logic AND-OR-INVERT function Connection Diagram Dual-In-Line Package TL F 6455 – 1 Order Number DM54S64J DM54S64W or DM74S64N See NS Package Number J14A N14A or W14B

Contextual Info: S64 National Semiconductor DM54S64/DM74S64 4-Wide AND-OR-INVERT Gates General Description This device contains a combination of gates which performs the logic AND-OR-INVERT function. Connection Diagram Dual-In-Line Package V,:i D C B K J y TL/F/6455-1 Order Number DM54S64J, DM54S64W or DM74S64N

TELEDYNE HNIL

Abstract: dtl logic gates CAG13 CAG13A CAG13C CAG13D CAG24 CAG27 CAG27-10 CAG42
Contextual Info: LOW Ron • • • • • CAG13, 13A, 13C, DUAL FET ANALOG GATES 13D, 24, 27, SPST AND DPST 27-10, 42 W ILL CONNECT AS SPDT AND DPDT BREAK BEFORE MAKE ACTION +10V SIGNAL LEVELS WORK FROM DTL, T TL, H N IL AND MOS LOGIC 20 V pp SIGNAL LEVELS AC OR DC WITH CAG42

Contextual Info: Philips Semiconductors Product specification Programmable logic sequencers 16 x 64 x 8 PLUS405-37/-45 DESCRIPTION • T TL com patible The PLUS405 devices are bipolar, program m able state machines of the M ealy type. Both the AND and the OR array are user-program m able. All 64 AND gates are connected to the 16

HAD15-HADO

Abstract: TMS32062x
Contextual Info: TNETC2080 UNCHANNELIZED MULTI-PROTOCOL COMMUNICATIONS CONTROLLER • Compatible With Texas Instruments Tl ATU-C Solution for ADSL • Allows Direct Access to Program and Control of External Devices Connected to the TNETC2080 • Provides Eight Full-Duplex Serial Interfaces

Contextual Info: DI9945 DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Features High Cell Density DMOS Technology Low On-State Resistance High Power and Current Capability Fast Switching Speed High Transient Tolerance SO-8 llll tpTffl ,6 TL uuu A P ÏT -M -N - Dim

d129

Abstract: D128 d128 TRANSISTOR G115 G123 33LY
Contextual Info: OTMÜH^IIL D 129 4-Channel MOS FET Switch D river w ith Decode GENERAL DESCRIPTION FEATURES • Quad Three-Input Gates Decode Binary Counter to Four Lines • Inputs Compatible with Low Power T T L and D TL, I p = 200/iiA Max • Output Current Sinking Capability 10mA