TIM02 Search Results

Contextual Info: 2 TO 6 GHz LOAD SOURCE VSWR INDEPENDENT DOWNCONVERTING MIXER MODEL: TIM0206HI2 FEATURES • IP3 independent of VSWR • RF/LO coverage. 2 to 6 GHz • IF operation. DC to 2 GHz • Input IP3 . +26 dBm typical

Contextual Info: 2 TO 6 GHz LOAD SOURCE VSWR INDEPENDENT DOWNCONVERTING MIXER MODEL: TIM0206HI2 FEATURES • IP3 independent of VSWR • RF/LO coverage .2 to 6 GHz • IF operation .DC to 2 GHz • Input IP3 .+26 dBm typical • LO/RF VSWR .1.5:1 typical

Contextual Info: 2 TO 6 GHz LOAD SOURCE VSWR INDEPENDENT DOWNCONVERTING MIXER MODEL: TIM0206HI2 FEATURES • IP3 independent of VSWR • RF/LO coverage .2 to 6 GHz • IF operation .DC to 2 GHz • Input IP3 .+26 dBm typical • LO/RF VSWR .1.5:1 typical

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

DMX0716L

Abstract: h2731 DM0204 TB0218LW2
Contextual Info: SINGLE-, DOUBLE- AND TRIPLE-BALANCED MIXERS SBW Single Balanced Waveguide MODEL NUMBER DB, DM Double Balanced NOMINAL LO POWER dBm (Note 1) FREQUENCY RANGE RF AND LO IF (GHz) (GHz) TB, TBR Triple Balanced CONVERSION LOSS (dB) (Typ./Max.) (Note 2) LO-RF ISOLATION

CSR BC5

Abstract: TX01 TMS320C64x DSP Megamodule Reference Guide
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

SCR RC10

Abstract: tim02 a15 c15 106c 12p 02B07FFF 02C30000 fcbga package weight TMS320C6000 C6000 0257FFFF LOG RX2 0808
Contextual Info: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

SPRM316

Abstract: C6000 DDR2-533 TCI6486 TMS320C6000 TMS320TCI6486 CSR BC5 TMS320TCI6486ZTZ 070CH
Contextual Info: TMS320TCI6486 www.ti.com SPRS300I – FEBRUARY 2006 – REVISED OCTOBER 2009 TMS320TCI6486 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6486 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian

MDIO controller

Abstract: C6000 DDR2-533 TMS320C6000 TMS320C64x DSP Megamodule Reference Guide BED02
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

Contextual Info: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

log tx 1044

Abstract: TR74 71011
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

112Bf

Abstract: SPRA387 0260F
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

TB0226LW2

Abstract: TB0218LW2
Contextual Info: SINGLE-, DOUBLE- AND TRIPLE-BALANCED MIXERS SBW Single Balanced Waveguide MODEL NUMBER DB, DM Double Balanced NOMINAL LO POWER dBm (Note 1) FREQUENCY RANGE RF AND LO IF (GHz) (GHz) TB, TBR Triple Balanced CONVERSION LOSS (dB) (Typ./Max.) (Note 2) LO-RF ISOLATION

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 1.1 www.ti.com CTZ/ZTZ BGA Package Bottom View The TMS320C6472 devices are designed for a package temperature range of 0°C to 85°C (commercial temperature range) or -40°C to 100°C (extended temperature range).

C6000

Abstract: DDR2-533 TMS320C6000 CSR BC5 LOG TX2 1108 rx2freebuffer rgmii specification tnetv Y10-Y12 002BFF
Contextual Info: TMS320C6472 www.ti.com SPRS612F – JUNE 2009 – REVISED FEBRUARY 2011 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

TMS3TCI6486BZTZ625

Contextual Info: TMS320TCI6486 SPRS300N – FEBRUARY 2006 – REVISED JULY 2011 www.ti.com TMS320TCI6486 Communications Infrastructure Digital Signal Processor 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian • C64x+ Megamodule Main Features:

71011

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Contextual Info: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Contextual Info: TMS320C6472 www.ti.com SPRS612E – JUNE 2009 – REVISED OCTOBER 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

CSR BC5

Abstract: C6472 SMC tr12
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

GT-64060

Abstract: 8x32 sram 0x04030201 R4000 R4640 R4650 8x32 R2000 mips processor
Contextual Info: GT-64060 High Integration PCI Bridge/ Memory Controller Preliminary Revision 1.0 8/12/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • High-integration PCI bridge/memory controller with three bus architecture

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller