TI017 Search Results

T1017

Contextual Info: 54ACT11190, 74ACT11190 SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS TI0171— D3462, M A R C H 1990 Inputs are TTL-Voltage Compatible 54ACT 11190 . . . J PACKAGE 74ACT11190 . . . DW OR N PACKAGE Single Down/Up Count Control Line TOP VIEW • Look-Ahead Circuitry Enhances Speed of

54ACT11828

Abstract: 74ACT11828 TIQ176-D3387
Contextual Info: 6^1723 31E » TEXAS INSTR LOGIC oaa^on 3 «tiis 54ACT11828, 74ACT11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS T '$ 5 L ~ C P \ - O 0 TI0176—03387, NOVEMBER 1989 • Inputs are TTL-Voltage Compatible 54ACT11828 . . . JT PACKAGE 74ACT11828 . . . DW OH NT PACKAGE

54ACT11190

Abstract: 74ACT11190 TI0171
Contextual Info: 54ACT11190, 74ACT11190 SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS TI0171— D3462, MARCH 1990 Inputs are TTL-Voltage Compatible 54ACT 11190 . . . J PACKAGE 74ACT11190 . . . DW OR N PACKAGE Single Down/Up Count Control Line TOP VIEW Look-Ahead Circuitry Enhances Speed of

74AC11190

Contextual Info: 54AC11190, 74AC11190 SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS TI0170— D 3461, MARCH 1990 Single Down/Up Count Control Line 54AC11190 . . . J PACKAGE 74AC11190 . . . D W O R N PACKAGE Look-Ahead Circuitry Enhances Speed of Cascaded Counters TOP VIEW RCO [ 1

Bus Drivers

Contextual Info: 54ACT11828, 74ACT11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS TI017Ö— 0 3 3 8 7 , NOVEMBER 1089 54ACT11828 . . . JT PACKAGE 74ACT11828 . . . DW OR NT PACKAGE Inputs are TTL-Voltage Compatible 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

Contextual Info: 54ACT11874, 74ACT11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS TI0179— D3447, M ARCH 1990 • Inputs are TTL-Voltage Compatible 54AC T11874 . . . JT PAC KAG E 7 4 A C T 1 1874 . . . D W O R N T P A C K A G E • 3-State Buffer-Type Outputs Drive Bus-Lines

54AC16245

Abstract: 74AC16245 AC16245 S1712
Contextual Info: 54AC16245, 74AC16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS TI0173— D3451, MARCH 1990 Members of the Texas Instruments Widebus Family 54AC16245 . . . W D PACKAGE 74AC16245 . . . DL PACKAGE TOP VIEW Packaged in Shrink Small Outline 300-mil Packages (SSOP) and 380-mil Fine-Pitch

Contextual Info: 6 ^ 1 7 2 3 D O a ^ O n 3 • TII3 31E D TEXAS INSTR LOGIC 54ACT11828, 74ACT11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS T '$ 5 L ~ C P \ - O 0 TI0176— 03387, NOVEMBER 1989 • Inputs are TTL-Voltage Compatible 54ACT11828 . JT P A C K AG E 74ACT11828 . DW OH NT P A C K A G E

74ACT11810

Abstract: 54ACT11810
Contextual Info: 54ACT11810, 74ACT11810 QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES TI0172— D3416, MARCH 1990 S4ACT11810 . . . J PACKAGE 74ACT11810 . . D OH N PACKAGE Inputs are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout TOP VIEW 1A[ 1Y[ 2Y[ GND[

Contextual Info: 54AC11874, 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS TI0178— D3446, M A R C H 1990 54AC11674 . JT P A C K A G E 74AC11674 . D W O R NT P A C K A G E • 3-State Buffer-Type Outputs Drive Bus>Llnes Directly TOP VIEW

Contextual Info: 54AC16245, 74AC16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS TI0173— D3451, M ARC H 1990 Member of the Texas Instruments Widebus Family 54A C 1 62 4 5 . . . W D P A C K A G E 7 4 A C 16245 . . . D L P A C K A G E TO P V IE W Packaged in Shrink Small Outline 300-mil

74AC11190

Contextual Info: 54AC11190, 74AC11190 SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS TI0170— D 3461, MARCH 1990 Single Down/Up Count Control Line 54AC11190 . . . J PACKAGE 74AC11190 . . . D W O R N PACKAGE Look-Ahead Circuitry Enhances Speed of Cascaded Counters TOP VIEW RCO [ 1

LT OB 2259

Contextual Info: 54ACT11190, 74ACT11190 SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS TI0171 — 0 3 4 6 2 , MARCH 1990 54ACT11190 . . . J PACKAGE 74ACT11190 . . . DW OR N PACKAGE • Inputs are TTL-Voltage Com patible • Single D ow n /U p C ount C o n tro l Line TOP VIEW

TI017

Contextual Info: 54AC11190, 74AC11190 SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS T I0170— 0 3461, MARCH 1990 • 54AC11 1 9 0 I PACKAGE 74AC11190 . . . OW OR N PACKAGE Single D o w n /U p C ount C ontrol Line Lo ok-A head Circuitry Enhances Speed of C ascaded Counters •

Contextual Info: 54ACT11853, 74ACT11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS T I0 1 77— 0 3 4 7 4 , MARCH 1090 54ACT11853 . - JT PACKAGE 74ACT11853 . DW or NT PACKAGE TOP VIEW • Inputs are TTL-Voltage Compatible • High-Speed Bus Transceivers with Parity Generator/Checker

Contextual Info: 54ACT11810, 74ACT11810 QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES T 10172— D3416, MARCH 1990 • Inputs are TTL-Voltage Compatible 54ACT11810 . . . J PACKAGE 74ACT11810 . . . D OR N PACKAGE • Flow-Through Architecture to Optimize PCB Layout TOP VIEW • Center-Pin Vcc and GND Configurations to

Contextual Info: 54AC11190, 74AC11190 SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS T I0 1 7 0 — D 3 4 6 1 , M A R C H 1 9 9 0 • Single Down/Up Count Control Line 54AC11190 . . . J PACKAGE 74AC11190 . . . DW OR N PACKAGE Look-Ahead Circuitry Enhances Speed of Cascaded Counters