TGT724FL Search Results

Contextual Info: TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC55V1325FF-8/10/12 PRELIMINARY 32,768 WORD x 32 BIT SYNCHRONOUS PIPELINE BURST SRAM Description The TC55V1325FF is a 1,048,576 bit synchronously pipelined burst SRAM that is organized as 32,768 words by 32 bits and designed for use in a secondary cache to support MPUs which have burst functions.

Contextual Info: - TC7S04F TC7S04F INVERTER U nit in mm The TC7S04F is a high speed C2MOS INVERTER fabricated with silicon gate C2MOS technology. It achieves high speed operation similar to equivalent LSTTL while m aintaining the C2MOS low power dissipation.

Contextual Info: TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC5117440BS J-60/70 PRELIMINARY 4,194,304 WORD X 4 BIT DYNAMIC RAM Description The TC5117440BSJ is the new generation dynamic RAM organized 4,194,304 word by 4 bits. TheTC5117440BSJ utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both