SR01021095 Search Results

Contextual Info: TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC55V1325FF-8/10/12 PRELIMINARY 32,768 WORD x 32 BIT SYNCHRONOUS PIPELINE BURST SRAM Description The TC55V1325FF is a 1,048,576 bit synchronously pipelined burst SRAM that is organized as 32,768 words by 32 bits and designed for use in a secondary cache to support MPUs which have burst functions.