TAG L9 230 Search Results

lm7805cv

Abstract: METAL DETECTOR PROGRAM PIC16F84 planar spiral coil Ferrite core 13.56 MHz RFID tag inductor antennas 5043cx100r0j PSK reader RFID FSK RFID reader SOURCE CODE ,microchip PG103001 DS00680C 4-henry choke
Contextual Info: microID 125 kHz RFID System Design Guide  2004 Microchip Technology Inc. DS51115F DATA SHEET MARKINGS Microchip uses various data sheet markings to designate each document phase as it relates to the product development stage. The markings appear at the bottom of the data sheet, between the copyright and document and page

IR3P02

Abstract: sharp tv audio section diagram 18-terminal tag l9 420 400 tag l9 230 400
Contextual Info: TV MPX Demodulator Europe IR3P02 • IR3P02 TV MPX Demodulator (Europe) Pin Connections Description The IR3P02 is an integrated circuit for demodulat­ ing European TV-MPX broadcasts. The use of PLL makes reed filters unnecessary. Applications include T.V. recievers, TV-MPX tuners etc. The IR3P02 is

ddc BUS-65522

Abstract: MIL-STD-1553 cable connector
Contextual Info: 00Q ILC DATA DEVICE CORPORATION«_ BUS-6552211, 6552311, and 65524 MIL-STD-1553B BC/RT/MT VME/VXI INTERFACE UNIT FEATURES * VMEbus/VXIbus Interface DESCRIPTION The BUS-65522II/65523II/65524 pro­ vides full, intelligent interfacing between the serial dual redundant MIL-STD1553B Data Bus and the parallel VMEbus and VXIbus. Software controls the

Contextual Info: Make sure the next Card you purchase has. BU-65743/65843/65863/65864 PCI MINI-ACE MARK3 AND PCI MICRO-ACE®*-TE TM ® FEATURES • 32-Bit/33MHz, 3.3Volt, PCI Target Interface • Fully Integrated 1553A/B Notice 2, 1760, McAir, STANAG 3838 Interface Terminal

73205A-AE8 500

Abstract: transistor BC 324
Contextual Info: Make sure the next Card you purchase has. BU-65743/65843/65863/65864 PCI MINI-ACE MARK3 AND PCI MICRO-ACE®*-TE TM ® FEATURES • 32-Bit/33MHz, 3.3Volt, PCI Target Interface • Fully Integrated 1553A/B Notice 2, 1760, McAir, STANAG 3838 Interface Terminal

m21036

Abstract: str 2105 plan str 2105 01C0-O23F BUS-61559 S-63930 BUS-63920 STANAG-3910 tag l9 225 400 stanag 3910
Contextual Info: 000 BUS-61559 SERIES IUC DATA DEVICE CORPORATION _ MIL-STD-1553B NOTICE 2 ADVANCED INTEGRATED MUX HYBRIDS with ENHANCED RT FEATURES AIM-HY’er DESCRIPTION DD C’s BUS-61559 series of Ad­ vanced Integrated Mux Hybrids with en­ hanced RT Features (A IM -H Y ’er)

UT1553

Abstract: Mil-STD-1773 RTMP-10
Contextual Info: UT1553 Remote Terminal Multi-Protocol FEATURES INTRODUCTION p Complete MIL-STD-1553 Remote Terminal Interface p Mode selectable to comply with either MIL-STD- The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements

MIL-STD-1773

Abstract: ST26A T23B t23j t22i 1553B UT1553 st23b D1083
Contextual Info: UT1553 Remote Terminal Multi-Protocol F EATURES INTRODUCTION p Complete MIL-STD-1553 Remote Terminal Interface p Mode selectable to comply with either MIL-STD- The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements

rta2

Contextual Info: UT1553 Remote Terminal Multi-Protocol FEATURES INTRODUCTION ❐ Complete VLSI MIL-STD-1553 Remote Terminal The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements for a dual-redundant MIL-STD-1553 Remote Terminal

CONDITIONS31

Abstract: B1274 1553B UT1553 what about 1553 bus
Contextual Info: UT1553 Remote Terminal Multi-Protocol FEATURES INTRODUCTION ❐ Complete VLSI MIL-STD-1553 Remote Terminal The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements for a dual-redundant MIL-STD-1553 Remote Terminal

UT1553B

Abstract: 1553b rti CHA Series mil-std-1553b SPECIFICATION 1553B UT1553 RTMP rta2
Contextual Info: UT1553 Remote Terminal Multi-Protocol FEATURES INTRODUCTION ❐ Complete VLSI MIL-STD-1553 Remote Terminal The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements for a dual-redundant MIL-STD-1553 Remote Terminal

Contextual Info: Prelim in ary SME1040 S un M ic r o e l e c t r o n ic s Ju ly 1997 UltraSPARC -lli DATA SHEET Highly Integrated 64-Bit RISC Processor, PCI Interface F u n c t io n a l D e s c r ip t io n U ltra S P A R C -II¿ SM E1040 is a highly-integrated 64-bit SP A R C V9 superscalar processor. A n optional A P B ™

cmos circuit simulink example

Abstract: B11G8 TN1126
Contextual Info: LatticeXP2 Family Data Sheet DS1009 Version 01.1, May 2007 LatticeXP2 Family Data Sheet Introduction May 2007 Advance Data Sheet DS1009 Features – – – – • flexiFLASH™ Architecture • • • • • • Instant-on Infinitely reconfigurable

B11G8

Abstract: TN1141 LFXP2-17E-5FTN256C tag l9 225 400 sequential gearbox LFXP2-17E-6Q208 TN1126 WITH18-BIT LFXP2-17E-5QN208C
Contextual Info: LatticeXP2 Family Data Sheet DS1009 Version 01.1, May 2007 LatticeXP2 Family Data Sheet Introduction May 2007 Advance Data Sheet DS1009 Features – – – – • flexiFLASH™ Architecture • • • • • • Instant-on Infinitely reconfigurable

0xEDB88320

Contextual Info: Intel Ethernet Switch FM4000 24-Port 10G Ethernet L2/L3/L4 Switch/Router Datasheet May 2013 Revision 2.6 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN

dps 298 cp 2

Abstract: 286 dram schematic 85A9 k2 dsc hen ng dps 298 cp UltraSPARC ii FRS 8C - 05 9V DC
Contextual Info: if 4 4 o Q O o < o o f O O O I O o o o < I O O O O ( 5 o ò o ° 5 ‘ o o < o Dual Processor System Controller (DSC) Prelim in ary Data Sheet O c to b e r 1 996 S T P 220 2B G A S un M icroelectronics October 1996 U lt r a S P A R C DATA SHEET - I/II

tag2n

Abstract: rta2 T26G
Contextual Info: UT1553 Remote Terminal Multi-Protocol F I eatures □ Com plete VLSI M IL-STD-1553 Remote Term inal Interface □ M ode selectable to comply with either M IL-STD-1553 A or M IL-STD-1553B bus protocol □ Remote term inal operation is certified by ASD/ENASC formerly SEAFAC

Contextual Info: Intel Ethernet Switch FM4000 24-Port 10G Ethernet L2/L3/L4 Switch/Router Datasheet April 7, 2011 Revision: 2.4 Intel® Ethernet Switch FM4000 24-Port 10G Ethernet L2/L3/L4 Switch/Router Table of Contents 1. Introduction . 13

mb86904

Abstract: microsparc SUN MICROELECTRONICS CPGA321 MB8690 STP1012PGA STP1012PGA-85 SPARC v8 architecture BLOCK DIAGRAM sparc v8 STP1012PGA-110
Contextual Info: STP1012 S un M icro electro nics J u ly 1 9 9 7 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n T h e m icroSP A R C -II 32-b it m icro p ro cesso r is a h ig h ly integrated , h ig h -p erfo rm an ce m icroprocessor. Im p le­

Contextual Info: CIRRUS LOGIC INC/ PIXEL bSE D •ÌDD33bM □ □□OQf33 TZfl ■ PIXL CL-PX2070 Pixel Semiconductor Preliminary Data Book A C irru s L o g ic C o m p a n y APPLICATIONS ■ ■ ■ ■ ■ ■ Presentation Video Editing Video Authoring Video Teleconferencing

MB87Q3140

Abstract: MB87Q3141 MB87Q3141RB-GE1 xbee TRC1000 program eeprom 24c32
Contextual Info: Fujitsu Microelectronics America, Inc. 1601 Trapelo Road Suite 273 Waltham, Ma 02451 July 19, 2006 Thuan Nguyen Qualcomm Incorporated 5775 Morehouse Drive San Diego, CA 92121-1714 Dear Thuan: The following information is intended to alleviate some confusion that has resulted regarding

Contextual Info: ì STP2202ABGA S un M ic r o e l e c t r o n ic s July 1997 DSC Dual Processor System Controller DATA SHEET D e s c r ip t io n The STP2202BGA is the Dual Processor System Controller, also referred to as DSC, used in a low-cost high-performing two-processor system. DSC’s prim ary functions are to provide data coherence control,

Contextual Info: STP1091 S un M ic r o e l e c t r o n ic s J u ly 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-perform ance external cache controller for the STP1020 SuperSPARC and STP1021

SuperSPARC

Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys­