TAG A3 Search Results

tag 136

Abstract: 71B74 71216 AN-136 IDT71215 IDT71216 International Power Devices oet 71215
Contextual Info: A NEW GENERATION OF TAG SRAMS—THE IDT71215 AND IDT71216 APPLICATION NOTE AN-136 Integrated Device Technology, Inc. By Kelly Maas INTRODUCTION CACHE AND TAG BASICS The 71215 and 71216 represent a new generation of integrated Tag SRAMs. Just as earlier Tag SRAMs such as

mb81c51

Contextual Info: cP February 1990 Edition 2.0 - - DATA S H E E T FUJITSU MB81C51-2S/-30 CMOS TAG RANDOM ACCESS MEMORY CMOS Tag Random Access Memory The Fujitsu MB81C51 is a 512 entry x 4 way or 1024 entry x 2 way tag random access memory Tag RAM fabricated with CMOS technology.

IDT7174

Abstract: IDT71B74 L7C174PC12 L7C174PC15 L7C174PC20 L7C174PC25 L7C174WC
Contextual Info: L7C174 L7C174 DEVICES INCORPORATED 8K x 8 Cache-Tag Static RAM 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic ❑ High Speed Address-to-MATCH — 12 ns maximum ❑ High Speed Flash Clear

cache tag Static RAM

Contextual Info: IDT71215 BiCMOS Static RAM 240K 16K x 15-Bit Cache-Tag RAM for the Pentium Processor Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ stored TAG bits and the current Tag input data. An active HIGH MATCH output is generated when these two groups of data are the

TH 3067

Abstract: tag a3 3067
Contextual Info: IDT71216 BiCMOS Static RAM 240K 16K x 15-Bit Cache-Tag RAM for PowerPC and RISC Processors Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ stored TAG bits and the current Tag input data. An active HIGH MATCH output is generated when these two groups of data are the

TAG 8816

Abstract: tiris rfid Transponder protocol irreversible locking automatic repeat request D516
Contextual Info: Tag-it Reader System Series 6000 Host Protocol Reference Manual 11-04-21-001 July 1999 1 Tag-it Reader Host Protocol Reference Manual July 1999 Edition Two - July 1999 This is the second edition of this manual for the Tag-it Reader Host Protocol. It describes the firmware command set as implemented with release 2 and beyond

keyboard laptop

Contextual Info: RX95HF Near field communication transceiver for tag emulation Datasheet - production data Applications Typical protocols supported: • ISO/IEC 14443-3 Type A tag emulation Typical RX95HF applications include:  Keyboard, laptop, set top box, printer, TV, etc.

Contextual Info: RX95HF Near field communication transceiver for tag emulation Datasheet - production data Applications Typical protocols supported: • ISO/IEC 14443-3 Type A tag emulation Typical RX95HF applications include:  Keyboard, laptop, set top box, printer, TV, etc.

"Lookaside Cache"

Contextual Info: : CMOS CACHE CONTROLLER WITH TAG FOR INTEL PENTIUM PROCESSORS Jd t IDT71V280 Integrated Device Technology, Inc. FEATURES DESCRIPTION • Provides the Cache Tag, Status Bits, CPU interface control and Data SRAM control for Pentium CPU-based systems

marking 3U 3T 3C diode 3E 3G

Abstract: marking 3U 3T 3C diode marking 3U 3T diode GALVANTECH marking 2U 58 diode GVT7164T18
Contextual Info: ADVANCE INFORMATION GALVANTECH, INC. SYNCHRONOUS CACHE TAG SRAM PIPELINED OUTPUT GVT7164T18 64K X 18 SYNCHRONOUS TAG SRAM 64K x 18 SRAM +3.3V SUPPLY WITH CLOCKED REGISTERED INPUTS FEATURES GENERAL DESCRIPTION • • • • • • • • • • • •

Contextual Info: ^ E D _ EDI8F176128C I Electronic Designs Inc. 22.5M Secondary Cache Memory Array Module DiF iiMD©i 128Kx176 Asynchronous Static RAM Module with TAG, TAG ECC, and DATA ECC Features The EDI8F176128C is a single array multichip Static RAM module organized asa 131,072x176bitmemory array.

DS1201

Contextual Info: DS1201 DS1201 Electronic Tag FEATURES • User-insertable, PIN ASSIGNMENT nonvolatile 1024 bits of read/write memory DALLAS • Low-power CMOS circuitry allows for 10 years of data DS1201 retention ELECTRONIC TAG • Miniature and transportable • Durable and rugged

7510C

Abstract: THS-635W THS-620Y THS-620W HellermannTyton MIL-M-81531 TYHC34-66 615Y THS-610Y marking 3t1
Contextual Info: Identifying SHRINK-TAG MARKERS HellermannTyton’s Shrink-Tag system is a heat shrink identification method which makes it easy to mark wire, cable, terminals, and other components. For efficient marking, Shrink-Tags can be printed using HellermannTyton’s thermal transfer printers and the

GVT71256T18

Abstract: DQ974
Contextual Info: ADVANCE INFORMATION GALVANTECH, INC. SYNCHRONOUS CACHE TAG SRAM PIPELINED OUTPUT GVT71256T18 256K X 18 SYNCHRONOUS TAG SRAM 256K x 18 SRAM +3.3V SUPPLY WITH CLOCKED REGISTERED INPUTS FEATURES GENERAL DESCRIPTION • • • • • • The Galvantech Synchronous Burst SRAM family

Contextual Info: CY7B180 CY7B181 PRELIMINARY CYPRESS SEMICONDUCTOR Features 4K x 18 Cache Tag • Can be used as 4K x 18 SRAM Functional Description Supports 50-MHz cache for all major high-speed processors 4K x 18 tag organization BiCMOS for optimum speed/power High speed

Contextual Info: 4K x 4 CMOS Cache-Tag Static RAM FEATURES_ DESCRIPTION _ □ 4K x 4 CMOS Static RAM with 4-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 10 ns maximum □ Totem Pole L7C180 or Open Drain (L7C181) MATCH Output □ High Speed Hash Gear

Contextual Info: ^ EDI B«ctronic Designs Inc E D I8 F 1 7 6 2 5 6 C .1 45M Secondary Cache Memory Array Module 256KX176 Asynchronous Static RAM Module with TAG, TAG ECC, and DATA ECC Features The EDI8F176256C is a single array multichip Static RAMmoduleorganizedasa262,144x176bitmernory array.

mifare 1k

Abstract: mifare s50 MIFARE command mf1 s50 mifare s50 MIFARE mifare s50 Mifare 1k commands mifare 4k MF1K nxp nfc 001830
Contextual Info: Mifare Std as NFC Forum Enabled Tag Extensions for Mifare standard 1k/4k as NFC Forum Enable Tag Rev. 1.1 — 21 August 2007 Application note Document information Info Content Keywords NFC Forum, NFC Forum data mapping, Mifare Standard 1k/4k, Mifare Standard 1k, Mifare Standard 4k

L7C174WC-15

Abstract: idt7174 l7c174wc15 L7C174CM20 L7C174WC25
Contextual Info: L7C174 L7C174 DEVICES INCORPORATED 8K x 8 Cache-Tag Static RAM 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED FEATURES DESCRIPTION ❑ Low Power Operation Active: 300 mW typical at 35 ns Standby: 500 µW typical ❑ Data Retention at 2 V for Battery Backup Operation

HE2V

Contextual Info: MOTOROLA Order this document SEMICONDUCTOR TECHNICAL DATA by MPC27T416/D MPC27T416 Advance Information 16K x 16 Bit Cache Tag RAM for PowerPC Processors The MPC27T416 is a 262,144 bit cache-tag static RAM designed to support PowerPC microprocessors at bus speeds up to 66 MHz. It is organized as

Contextual Info: L7C174 8K x 8 Cache-Tag Static RAM FEATURES_ □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum □ Low Power Operation

Contextual Info: Order this document SEMICONDUCTOR TECHNICAL DATA by MPC27T415/D MPC27T415 Advance Information 16K x 15 Bit Cache Tag RAM for PowerPC Processors The MPC27T415 is a 245,760 bit cache-tag static RAM designed to support PowerPC microprocessors at bus speeds up to 66 MHz. It is organized as 16K

Contextual Info: Integrated D evice Technology, Inc. BiCMOS StaticRAM 240K 16K x 15-BIT CACHE-TAG RAM For the Pentium Processor FEATURES: • 16K x 15 Configuration - 1 2 TAG Bits - 3 Separate I/O Status Bits (Valid, Dirty, Write Through) • Match output uses Valid bit to qualify M ATCH output

Contextual Info: L7C174 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED DESCRIPTION FEATURES □ 8K x 8 CMOS Static RAM w ith 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum