T9.5 Search Results

H 1061

Abstract: SST29EE010 SST29VE010 SST29EE010-90-4C-NH
Contextual Info: 1 Mbit 128K x8 Page-Write EEPROM SST29EE010 / SST29VE010 SST29EE / VE0101Mb (x8) Page-Write, Small-Sector flash memories Data Sheet FEATURES: • Single Voltage Read and Write Operations – 4.5-5.5V for SST29EE010 – 2.7-3.6V for SST29VE010 • Superior Reliability

Contextual Info: W632GU6KB 16M  8 BANKS  16 BIT DDR3L SDRAM Table of Contents1. GENERAL DESCRIPTION . 5 2. FEATURES . 5

Contextual Info: W631GU6KB 8M  8 BANKS  16 BIT DDR3L SDRAM Table of Contents1. GENERAL DESCRIPTION . 5 2. FEATURES . 5

W631GG6KB-12

Abstract: W631GG6KB-15 W631GG6KB15A DDR3 DIMM SPD JEDEC 24si 9x13 W631GG6KB15K w631gg6k W631GG6KB12I W631GG6KB-15I
Contextual Info: W631GG6KB 8M  8 BANKS  16 BIT DDR3 SDRAM Table of Contents1. GENERAL DESCRIPTION . 5 2. FEATURES . 5

AVQ100B-48S05

Abstract: AVQ100B-48S3V3 AVQ100 AVQ100B-48s0 AGQ100-48S1V5 AVQ-10 AGQ100
Contextual Info: AGQ100&AVQ100B Series DC/DC Converter TRN AGQ100&AVQ100B Series DC/DC Converter Technical Reference Notes Industry Standard Quarter Brick: 36~75V Input, 1.2V~5V Single Output Features • • Industry Standard Quarter Brick : 2.28”X 1.45’’ X 0.38’’ open frame or

W631GU8KB15K

Contextual Info: W631GU8KB 16M  8 BANKS  8 BIT DDR3L SDRAM Table of Contents1. GENERAL DESCRIPTION . 5 2. FEATURES . 5

W632GG6KB

Abstract: W632GG6KB15I
Contextual Info: W632GG6KB 16M  8 BANKS  16 BIT DDR3 SDRAM Table of Contents1. GENERAL DESCRIPTION . 5 2. FEATURES . 5

SST29EE010

Abstract: SST29EE010-70-4C-PHE transistor 1061 SST29VE010
Contextual Info: 1 Mbit 128K x8 Page-Write EEPROM SST29EE010 / SST29VE010 SST29EE / VE0101Mb (x8) Page-Write, Small-Sector flash memories Data Sheet FEATURES: • Single Voltage Read and Write Operations – 4.5-5.5V for SST29EE010 – 2.7-3.6V for SST29VE010 • Superior Reliability

K3L10

Contextual Info: M 3D E 271 F5 Î H O tm A S fll R R 3 7 3 IS S E M I C O N D U C T O R IH kZCD4020BMS,CD4024BMS CD4040BMS HA R R I S S E M I C O N D SE C T O R 5 0 E D Decem ber 1992 CMOS Ripple-Carry Binary Counter/Dividers 'T - 4 6 - Z S - n Pinouts Features CD4020BMS TOP VIEW

hynix ddr3

Abstract: ddr3 2133 DDR3-2133 DDR3-1333 DDR3-1866 780max
Contextual Info: DDR3 Device Operation DDR3 SDRAM Device Operation 1 DDR3 Device Operation Contents 1. Functional Description 1.1 Simplified State Diagram 1.2 Basic Functionality 1.3 RESET and Initialization Procedure 1.3.1 Power-up Initialization Sequence 1.3.2 Reset Initialization with Stable Power

RTL8192

Abstract: RTL819 abc c789 100uf 10p MEC1308-NU BA59-02570A tps51620 w192 BA41-01100A rtl-8192 mec1308
Contextual Info: Point LABEL-LOGO BEZEL-ODD KNOB-ODD LENS-ODD HDD Componet BA68-10150B BA81-06661A BA81-06662A BA81-06663A BA59-02348A Object description LABEL-LOGO_SAMSUNG;NP,SEC,ARTPAPER+OPP COATING,-,-,-,-,W

sot23 w32

Abstract: SOT23 DMB BA39-00628A TESA4982 HED55XXU12 BA41-00725A SMD Code 12W SOT-23 A3212ELH/HED55XXU12 LF80537NE0301MN w342 9g
Contextual Info: Main System Design location Level Parts Code Parts Description Spec.

Contextual Info: DATA SHEET 1G bits DDR3 SDRAM EDJ1108BABG 128M words x 8 bits EDJ1116BABG (64M words × 16 bits) Specifications Features • Density: 1G bits Organization  16M words × 8 bits × 8 banks (EDJ1108BABG)  8M words × 16 bits × 8 banks (EDJ1116BABG)

EDJ4208BASE-DJ-F

Abstract: EDJ4208BASE EDJ4208BASE-GN-F 1024M ELPIDA DDR3 User
Contextual Info: DATA SHEET 4G bits DDR3 SDRAM EDJ4204BASE 1024M words x 4 bits EDJ4208BASE (512M words × 8 bits) Specifications Features • Density: 4G bits • Organization  128M words × 4 bits × 8 banks (EDJ4204BASE)  64M words × 8 bits × 8 banks (EDJ4208BASE)

T40 16 ultrasonic

Contextual Info: L<. ru c: ” Ial c E: rl r 1 c $1 !‘7 I * plrasRvARY 18, X999 lu TEST REPORT #98689 . . . tar QUALIFICATLOM TESTING . X&T-075-05-L-D-A HItF-075-02-L-D-A SAMTEC CORPORATION APPROVED BY: MAX PEEL PRESIDENT AND DIRECTOR OF ADVABTCED RESEARCH CONTECH RESEARCH, INC.

EDJ4208EASE-DJ

Abstract: EDJ4208EASE-DJ-F 1024M DDR3 4G SPD DDR3L-1066F DDR3L-1333
Contextual Info: DATA SHEET 4G bits DDR3L SDRAM EDJ4204EASE 1024M words x 4 bits EDJ4208EASE (512M words × 8 bits) Specifications Features • Density: 4G bits • Organization  128M words × 4 bits × 8 banks (EDJ4204EASE)  64M words × 8 bits × 8 banks (EDJ4208EASE)

EDJ4216BASE

Abstract: E1646E41 105WR
Contextual Info: DATA SHEET 4G bits DDR3 SDRAM EDJ4216BASE 256M words x 16 bits Specifications Features • Density: 4G bits • Organization: 32M words × 16 bits × 8 banks • Package: 96-ball FBGA ⎯ Lead-free (RoHS compliant) and Halogen-free • Power supply: VDD, VDDQ = 1.5V ± 0.075V

EDJ2104EDBG

Abstract: ELPIDA DDR3 DDR3L-1066 edj2108EDBG E1797E41 EDJ2108EDBG-DJ-F EDJ2108EDBG-GN-F
Contextual Info: DATA SHEET 2G bits DDR3L SDRAM EDJ2104EDBG 512M words x 4 bits EDJ2108EDBG (256M words × 8 bits) Specifications Features • Density: 2G bits • Organization  64M words × 4 bits × 8 banks (EDJ2104EDBG)  32M words × 8 bits × 8 banks (EDJ2108EDBG)

J1108

Contextual Info: PRELIMINARY DATA SHEET 1G bits DDR3 SDRAM EDJ1108BABG 128M words x 8 bits EDJ1116BABG (64M words × 16 bits) Specifications Features • Density: 1G bits Organization  16M words × 8 bits × 8 banks (EDJ1108BABG)  8M words × 16 bits × 8 banks (EDJ1116BABG)

Contextual Info: PRELIMINARY DATA SHEET 512M bits DDR3 SDRAM L EO EDJ5304BASE 128M words x 4 bits EDJ5308BASE (64M words × 8 bits) EDJ5316BASE (32M words × 16 bits) Features • Density: 512M bits • Organization ⎯ 16M words × 4 bits × 8 banks (EDJ5304BASE) ⎯ 8M words × 8 bits × 8 banks (EDJ5308BASE)

E1629E20

Abstract: EDJ1108BFBG-DJ-F
Contextual Info: PRELIMINARY DATA SHEET 1G bits DDR3 SDRAM EDJ1104BFBG 256M words x 4 bits EDJ1108BFBG (128M words × 8 bits) Specifications Features • Density: 1G bits • Organization ⎯ 32M words × 4 bits × 8 banks (EDJ1104BFBG) ⎯ 16M words × 8 bits × 8 banks (EDJ1108BFBG)

Contextual Info: PRELIMINARY DATA SHEET 512M bits DDR3 SDRAM EDJ5308BBBG 64M words x 8 bits EDJ5316BBBG (32M words × 16 bits) Specifications Features • Density: 512M bits • Organization  8M words × 8 bits × 8 banks (EDJ5308BBBG)  4M words × 16 bits × 8 banks (EDJ5316BBBG)

EDJ8216B5MB

Abstract: E1824E
Contextual Info: PRELIMINARY DATA SHEET 8G bits DDR3L SDRAM, DDP EDJ8216E5MB 512M words x 16 bits Specifications Features • Density: 8G bits • Organization  64M words × 16 bits × 8 banks • Package  96-ball FBGA  DDP: 2 pieces of 4G bits chip sealed in one

A1A4M

Abstract: ELPIDA DDR3 User
Contextual Info: DATA SHEET 1G bits DDR3 SDRAM EDJ1108BABG 128M words x 8 bits EDJ1116BABG (64M words × 16 bits) Features • Density: 1G bits Organization  16M words × 8 bits × 8 banks (EDJ1108BABG)  8M words × 16 bits × 8 banks (EDJ1116BABG) • Package  78-ball FBGA (EDJ1108BABG)