T8979 Search Results

signalling and frame alignment in E1

Abstract: pin diagram of ic 74ls00 74LS00 MT8940 MT8979 MT8979AE MT8979AP 74LS00 integrated circuit CI 74LS00
Contextual Info: M IT E L ISO-CMOS ST-BUS FAMILY T8979 CEPT PCM 30/CRC-4 Framer & Interface Features ISSUE i March 1997 O rdering Inform ation • S ingle chip prim a ry rate 2048 kbit/s CEPT transceiver w ith C R C-4 option M T8979AE M T8979AP M eets CC ITT R ecom m endation G.704

Contextual Info: M MT8940 T1 /CEPT Digital Trunk PLL ISO-CMOS ST-BUS FAMILY I T E L ISSUE 7 9161-002-035-NA July 1993 Features • Provides T1 clock at 1.544 MHz locked to input fram e pulse O rdering Inform ation MT8940AC MT8940AE • Sources CEPT 30 + 2 D igital Trunk/ST-BUS

740i

Abstract: 740S2 MT8920 X2930
Contextual Info: MITEL MT8920/MT8920-1 ST-BUS Parallel Access Circuit ISO-CMOS ST-BUS" FAM ILY 9161-002-084-NA ISSUE 4 Features • High speed parallel access to the serial ST-BUS. • Parallel bus to serial bus in terface optim ized fo r 68000 pP m ode 1 . • Fast dual-port RAM access (mode 2).

Contextual Info: MITEL T8979 CEPT PCM 30/CRC-4 Framer & Interface ISO-CMOS ST-BUS” FAMILY 9161-002-087-NA Features • Single chip prim ary rate 2048 kbit/s CEPT transceiver w ith CRC-4 option • M eets CCITT Recom m endation G.704 • Selectable H DB3 or A M I line code

Contextual Info: CMOS ST-BUS FAMILY 04Hitel MT8941 Advanced T1/CEPT Digital Trunk PLL Features July 1993 Ordering Inform ation • Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock fram e pulse • Provides CEPT c lo ck at 2.048 M Hz and ST-BUS clock and tim ing signals locked to an internal or

CV 203

Abstract: MH89760 MH89760B MT8940 MT8940AE
Contextual Info: ISO-CMOS ST-BUS FAMILY M ITEL MT8940 T1/CEPT Digital Trunk PLL Features ISSUE i M arch 1997 O rdering Inform ation Provides T1 clock at 1.544 MHz locked to input fram e pulse • Sources C EPT 30+2 D igital Trunk/ST-BUS clock and tinning signals locked to internal or

Contextual Info: ISO -C M O S ST-BUS FAMILY • V IIT E L MT8977 T1/ESF Framer Circuit ACCUNET® T1.5 Prelim inary Inform ation s e m ic o n d u c t o r Features ISSUE 4 D3/D4 or ESF fram ing and S LC -96 com patible Two fram e elastic buffer w ith jitte r tolerance

Contextual Info: MITEL SEMICONDUCTOR 12E D | MITEL. b2Mcl370 □D0S2M2 =i | T8979 CEPT PCM 30 Digital Trunk Interface ST-BUS F A M IL Y T - 7 S - U - & P relim inary In fo rm a tio n m Features Pin Connections • Single chip primary rate 2048 kbit/s CEPT transceiver w ith CRC-4 option.

Contextual Info: MITEL* MH89790 CEPT PCM 30/CRC-4 Framer & Interface ST -B U S" F A M IL Y Prelim inary In fo rm a tio n 9161-002-080-N A ISSUE 4 Features Pin Connections Com plete prim ary rate 2048 kbit/s CEPT transceiver w ith CRC-4 option. Selectable HDB3 or A M I line code.

Contextual Info: MT8941 Advanced T1/CEPT Digital Trunk PLL CMOS ST-BUS " FAMILY MITEL 9161-002-132-NA Features ISSUE 5 July 1993 Ordering Information • Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock frame pulse • Provides CEPT clock at 2.048 MHz and ST-BUS

slc 500 circuit diagram

Abstract: MH89761 MT8952 MT8976 MT8976AE MT8976AP MT8977 MT8979 MT8980 mark l8r
Contextual Info: ISO-CMOS ST-BUS FAMILY MT8976 T1/ESF Framer Circuit g M ITEL S E M IC O N D U C T O R Features ISSUE 11 O ctober 1997 O rdering Inform ation • D3/D4 or ESF fram ing and S LC -96 com patible • 2 fram e ela stic buffer w ith 32 usee jitte r buffer

7407S

Contextual Info: ISO-CMOS ST-BUS FAMILY MT8976 T1/ESF Framer Circuit _ g MITEL Features ISSUE 9 May 1995 O rdering Inform ation D3/D4 or ESF framing and SLC-96 compatible M T8976AC MT8976AE MT8976AP 2 frame elastic buffer with 32 usee jitter buffer Insertion and detection of A, B,C,D bits.

Contextual Info: ISO-CMOS ST-BUS FAMILY MT8976 T1/ESF Framer Circuit g M ITEL S E M IC O N D U C T O R Features ISSUE 11 O ctober 1997 O rdering Inform ation D3/D4 or ESF fram ing and S LC -96 com patible 2 fram e elastic buffer w ith 32 |a,sec jitte r buffer M T8976AE

2181a

Abstract: CS61534 DS2180A HC49 LXP600A LXT305 PWH 324
Contextual Info: «AY 2 3 IM Preliminary Information S tandard Product April, 1991 LXT305 T1/El In te g ra te d Short Haul Transceiver with Transmit Jitter A tte n u a tio n Features General Description The LXT305 is a fully integrated transceiver for both North American 1.544 MHz T l , and European 2.048 MHz