T56L8 Search Results

XR-T56L85

Abstract: XR-T56L85D XR-T56L85N pulse transformer circuit
Contextual Info: XR-T56L85 Z ” E X A R Low Power PCM Line Interface .the analog plus com pany June 1997-3 FEATURES'! 0 APPLICATIONS Low Power Typical 14mA T1 and CEPT Interfaces Single +5V Supply CPI Up to 2.048 Mbps Operation in Both TX and RX Directions DMI Receiver Input can be:

DIL18

Contextual Info: DATA SHEET Communications T1/E1 T56L85 Low Power PCM Line Interface The XR-T56L85 is a PCM line interface chip. It consists of both transmit and receive circuitry in a DIL 18 pin package. The maximum bit rate the chip can handle is 2.048 Mbps and the signal level to the received can be attenuated by 10dB of cable loss at half the bit

Contextual Info: XR-T56L85 Low Power PCM Line Interface PIN ASSIGNMENT GENERAL DESCRIPTION The XR-T56L85 is a PCM line interface chip. It consists of both transmit and receive circuitry in a DIL 18 pin package. The maximum bit rate the chip can handle is 2.048 Mbps and the signal level to the receiver can be

FEATURES10

Abstract: T56L85N ttl buffer XR-T56L85 XR-T56L85D XR-T56L85N PE65415
Contextual Info: XR-T56L85 .the analog plus Low Power PCM Line Interface company TM June 1997-3 FEATURES10 APPLICATIONS D Low Power Typical 14mA D Single +5V Supply D Up to 2.048 Mbps Operation in Both TX and RX Directions D Receiver Input can be: – Balanced Transformer Coupled

Contextual Info: XR-T56L85 PRELIMINARY DATASHEET Low Power PCM Line Interface GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T56L85 is a PCM line Interface chip. It consists ol both transmit and receive circuitry in a DIL 18 pin package. The maximum bit rate the chip can handle is

Contextual Info: XR-T56L85 Ï S T E X A R Low Power PCM Line Interface .th e a n a lo g p lu s c o m p a n y TM December 1996-2 APPLICATIONS FEATURES • Low Power Typical 14mA • Single +5V Supply • Up to 2.048 Mbps Operation in Both TX and RX Directions • • T1 and CEPT Interfaces

Contextual Info: XR-T56L85 JZ TE X A R Low Power PCM Line Interface .the analog plus com pany June 1997-3 FEA T U R E S1 0 APPLICATIONS Low Power Typical 14mA T1 and C E P T Interfaces Single +5V Supply CPI Up to 2.048 Mbps Operation in Both TX and RX Directions DMI

T56L8

Contextual Info: XR-T56L85 C 'E X A [.the analog plus company R Low Power PCM Line Interface JM J u n e 19 97-3 FEATURES1 0 APPLICATIONS • • Low Power Typical 14mA Single +5V Supply • T1 and CEPT Interfaces • Up to 2.048 Mbps Operation in Both TX and RX Directions

Contextual Info: 2 T E X A R XR-T56L85 Low Power PCM Line Interface GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T56L85 is a PCM line interface chip. It consists of both transmit and receive circuitry in a DIL 18 pin package. The maximum bit rate the chip can handle is 2.048 Mbps and the signal level to the receiver can be

COUNTER MODULO 503

Abstract: 61535 6418 CXT6176 AN-523 VCI07
Contextual Info: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427C FEATURES DESCRIPTION • Four-channel AAL1 segmentation and reassembly • Selectable AMI/B8ZS/HDB3 line coding COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the

25 MHZ TXC

Contextual Info: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427C FEATURES DESCRIPTION • Four-channel AAL1 segmentation and reassembly • Selectable AMI/B8ZS/HDB3 line coding COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the

Contextual Info: C O B R A Devi ce C o n s ta n t Bit Rate ATM Adaptation Layer 1 TXC-05427B DATA SHEET FEATURES DESCRIPTION COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both

RT024

Abstract: VCI07 RT015 KF03 61535 rt033 T5683 T5684 KF07 RT01B
Contextual Info: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427 DATA SHEET Product Preview FEATURES DESCRIPTION • Four-channel AAL1 segmentation and reassembly COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the

Contextual Info: COBRA Device Constant Bit Rate ATM Adaptation Layer 1 TXC-05427 FEATURES i , —- = DATA SHEET Product Preview = DESCRIPTION COBRA C o nstant Bit Bate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both

Contextual Info: COBRA Device Constant Bit Rate ATM Adaptation Layer 1 TXC-05427B DATASHEET DESCRIPTION = = COBRA Constant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both Unstructured service (e.g., 1544 kbit/s and 2048 kbit/s)

WR22

Abstract: RT046
Contextual Info: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427C FEATURES DESCRIPTION • Four-channel AAL1 segmentation and reassembly COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both

rt043

Abstract: VCI07
Contextual Info: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427C FEATURES DESCRIPTION • Four-channel AAL1 segmentation and reassembly COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both

61535

Abstract: AN-523 rt022 arbiter decoder -1996 GFC01 "LCK"
Contextual Info: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427B DATA SHEET FEATURES DESCRIPTION COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both