LCK Search Results

he 234

Abstract: 835B
Contextual Info: LCK9B DC COMPONENTS CO., LTD. R TIRU RFDTJGJFR SQFDJBMJSTS LCK9N TFDIOJDBM SQFDJGJDBTJPOS PG SJOHMF2QIBSF SJMJDPO CRJEHF RFDTJGJFR VPMTBHF RBOHF 2 :5 lh 6555 Vhelk DURRFOT 2 935 Bfi_j_k GFBTURFS / J^_[e `hj ijcgl_^ ]cj]mcl \h[j^ / Smja_ hn_jeh[^ j[lcga? 675 Bfi_j_k i_[d

ta 8653

Abstract: LCK4953 L-LCK4953 MPC953
Contextual Info: Data Sheet March 2005 LCK4953/L-LCK4953 Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Output frequency up to 130 MHz in PLL mode. ■ Nine outputs with high-impedance disable. ■ 32-lead TQFP. ■ 50 ps cycle-to-cycle jitter. ■ Pin compatible with the Motorola MPC953 clock

LCK4973

Abstract: 2336 a
Contextual Info: a8e re AdLib OCR Evaluation systems Preliminary Data Sheet November 2002 LCK4973 Low-Voltage PLL Clock Driver Features Description . Fully integrated PLL . Agere Systems' LCK4973 is a 3.3 V12.5 V, PLL-based clock driver for high-performance RISC or CISC processor-based systems. The LCK4973 has

TMS626812

Contextual Info: TM2SJ64EPN 2097152 BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULES - SODIMM _ SMMS697A - AUGUST 1997 - REVISED NOVEMBER 1997 • • • • SYNCHRONOUS CLOCK CYCLE TIME *CK3 . CL = 3 + lCK2 (CL = 2) ACCESS TIME CLOCK TO OUTPUT *CK3

Contextual Info: MC74HC589N 1/2 IL00 * C-MOS 8-BIT SERIAL OR PARALLEL INPUT/SERIAL OUTPUT SHIFT REGISTER WITH 3-STATE OUTPUT —TOP VIEW— VDD (+2 to +6V) B 1 16 C 2 15 A D 3 14 SA E 4 13 SS/PL F 5 12 LCK G 6 11 SCK H 7 10 OE 9 8 GND A-H LCK OE QH SA SCK SS/PL

DS 2020

Abstract: CY7B993V CY7B994V JESD22-A114 LCK4993 LCK4993YH-DB LCK4993YH-DT LCK4994 chilled water system
Contextual Info: Data Sheet, Revision 1 May 5, 2004 LCK4993/LCK4994 Low-Voltage PLL Clock Drivers 1 Features • 12 MHz—100 MHz LCK4993 , or 24 MHz—200 MHz (LCK4994) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ 18 LVTTL 50% duty-cycle outputs capable of driving

Contextual Info: Product Brief September 2002 LCK4972 Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Output frequency up to 240 MHz. ■ Compatible with PowerPC and Pentium ® microprocessors. ■ 52-pin TQFPT. ■ 3.3 V/2.5 V power supply. ■ Pin compatible with 972 type devices.

7495 data sheet

Abstract: LCK4801
Contextual Info: Preliminary Data Sheet July 2001 LCK4801 Low-Voltage HSTL Differential Clock General Features The LCK4801 is a low-voltage, 3.3 V HSTL differential clock synthesizer. The LCK4801 supports two differential HSTL output pairs with frequencies from 336 MHz to 1 GHz. The clock is designed to

PLL 2400 MHZ

Contextual Info: Preliminary Data Sheet September 2002 LCK4972 Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Output frequency up to 240 MHz. ■ Compatible with PowerPC and Pentium ® microprocessors. ■ 52-pin TQFPT. ■ 3.3 V/2.5 V power supply.

X-TAL reference

Contextual Info: Preliminary Data Sheet November 2002 LCK4972 Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Output frequency up to 240 MHz. ■ Compatible with PowerPC and Pentium ® microprocessors. ■ 52-pin TQFPT. ■ 3.3 V/2.5 V power supply.

Contextual Info: Data Sheet April 2001 LCK4953 Low-Voltage PLL Clock Driver Features • Fully integrated PLL • • • • Output frequency up to 130 MHz in PLL mode Nine outputs with high-impedance disable 32-lead TQFP 50 ps cycle-to-cycle jitter Description The LCK4953 is a PLL-based clock driver device

LCK4972A

Contextual Info: Preliminary Data Sheet December 2002 LCK4972A Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Output frequency up to 240 MHz. ■ Compatible with PowerPC and Pentium ® microprocessors. ■ 52-pin TQFPT. ■ 3.3 V power supply. ■ Pin compatible with 972 type devices.

LCK4993V

Abstract: CY7B993V CY7B994V JESD22-A114 LCK4994 LCK4994V
Contextual Info: Advance Data Sheet November 2002 LCK4993V/LCK4994V Low-Voltage PLL Clock Drivers Features • 12/100 MHz LCK4993V , or 24/200 MHz (LCK4994V) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ ■ ■ ■ ■ ■ ■ 18 LVTTL 50% duty-cycle outputs capable of

HLDR-CSF371

Abstract: 0711S COLLAR-RCS370B
Contextual Info: LTR FORM 4 .0 4 - 0 0 1 C - COLLAR COLLAR—RCS370B REVISION DATE RELEASED A PP D 06-06-11 HOLDER (HLDR-CSF371 B) BULB (C F290—XXX—005V) 1.14 MAX ANODE (+ ) ~ 1 LE D TX CF290-M 5V □ a.335 0.515 _L .2 0 0 .230 NUT-KN370B LCKWSR-LW370 (SEE BELOW) NUT-HN370

Contextual Info: Data Sheet September 2000 LCK4953 Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Output frequency up to 125 MHz in PLL mode. ■ Nine outputs with high-impedance disable. ■ 32-lead TQFP. ■ 50 ps cycle-to-cycle jitter. Description The LCK4953 is a PLL-based clock driver device

transistor 123

Abstract: cj-ca
Contextual Info: LCK65B DC COMPONENTS CO., LTD. R TIRU RFDTJGJFR SQFDJBMJSTS LCK65N TFDIOJDBM SQFDJGJDBTJPOS PG SJOHMF2QIBSF SJMJDPO CRJEHF RFDTJGJFR VPMTBHF RBOHF 2 :5 lh 6555 Vhelk DURRFOT 2 65 Bfi_j_k GFBTURFS / J^_[e `hj ijcgl_^ ]cj]mcl \h[j^ / Smja_ hn_jeh[^ j[lcga? 755 Bfi_j_k i_[d

diode 345

Abstract: 835B "LCK"
Contextual Info: LCK;B DC COMPONENTS CO., LTD. R TIRU RFDTJGJFR SQFDJBMJSTS LCK;N TFDIOJDBM SQFDJGJDBTJPOS PG SJOHMF2QIBSF SJMJDPO CRJEHF RFDTJGJFR VPMTBHF RBOHF 2 :5 lh 6555 Vhelk DURRFOT 2 ;35 Bfi_j_k GFBTURFS / J^_[e `hj ijcgl_^ ]cj]mcl \h[j^ / Smja_ hn_jeh[^ j[lcga? 6<5 Bfi_j_k i_[d

Contextual Info: SN74LS594N IL00 * 8-BIT SHIFT REGISTER/LATCH —TOP VIEW— VCC QB OUT 1 +5 V 14 16 SI QA QB 10 QC OUT 2 15 QA OUT QD OUT 3 14 SI IN QE OUT 4 13 OE IN QF OUT 5 12 LCK IN QG OUT 6 11 SCK IN QH OUT 7 10 RES IN RES QC QD QE QF QG QH 11 12 15 1 2 3

Harbour Industries

Abstract: JESD78 LCK4310 LCK4310GF-DB LCK4310GF-DT MC100LVE310
Contextual Info: Data Sheet June 2003 LCK4310 Low-Voltage PLL Clock Driver Features • Output operating frequencies up to 1.25 GHz max. ■ 100 ps part–to–part skew. ■ 40 ps typical output–to–output skew. ■ Cycle-to-cycle jitter less than 7 ps max. ■ 3.3 V and 2.5 V compatible.

CY7BZ9973V

Abstract: LCK4973V MPC973
Contextual Info: Advance Data Sheet March 2002 LCK4973V Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Compatible with PowerPC processors. ■ 52-pin TQFPT. ■ 3.3 V power supply. ■ Description and Pentium ® micro- Pin compatible with Motorola ® MPC973,

JESD78

Abstract: LCK4310 LCK4310GF-DB LCK4310GF-DT MC100LVE310
Contextual Info: Preliminary Data Sheet September 2002 LCK4310 Low-Voltage PLL Clock Driver Features • Output operating frequencies up to 1.25 GHz max. ■ 100 ps part–to–part skew. ■ 40 ps typical output–to–output skew. ■ Cycle-to-cycle jitter less than 7 ps max.

LCK4950

Abstract: LCK4950S MPC950
Contextual Info: Data Sheet November 2001 LCK4950 Low-Voltage PLL Clock Driver Features • Fully integrated phase-locked loop PLL ■ Oscillator or crystal reference input ■ Output frequency up to 180 MHz ■ Outputs disable in high impedance ■ Compatible with PowerPC , Intel ®, and highperformance RISC microprocessors

Contextual Info: LCK65B TIRU RFDTJGJFR SQFDJBMJSTS LCK65N TFDIOJDBM SQFDJGJDBTJPOS PG SJOHMF2QIBSF SJMJDPO CRJEHF RFDTJGJFR VPMTBHF RBOHF 2 :5 lh 6555 Vhelk DURRFOT 2 65 Bfi_j_k GFBTURFS / J^_[e `hj ijcgl_^ ]cj]mcl \h[j^ / Smja_ hn_jeh[^ j[lcga? 755 Bfi_j_k i_[d LCK NFDIBOJDBM EBTB

Contextual Info: Advance Data Sheet September 2002 LCK4973V Low-Voltage PLL Clock Driver Features • Fully integrated PLL. ■ Output frequency up to 240 MHz. ■ Compatible with PowerPC and Pentium ® microprocessors. ■ 52-pin TQFPT. ■ 3.3 V/2.5 V power supply. ■