T54LS27 Search Results

T74LS273B1

Abstract: LS273 T54LS273D2 T74LS273C1 LHAD
Contextual Info: T54LS273 T74LS273 S S 8-BIT REGISTER WITH CLEAR DESCRIPTION The T54LS273/T74LS273 is a high speed 8-Bit Re­ gister. The register consists of eight D-Type Flipflops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch lead spacing.

c 3209

Contextual Info: S G S-TH0I1S0N D7E D I 7^537 LOW POWER SCH O TlR Y INTEGRATED CIRCUITS T54LS279 =] < 67C ODlbSb'l 0 1 i-n t74L*5?7q ^ •l^-V. mLhm i 16398 D T - 44-¿> 7 - / 5 - QUAD SET-RESET LATCH DESCRIPTION The T54LS279/T74LS279 is a high speed QUAD SET-RESET LACTH fabricated in LOW POWER

T74LS27B1

Abstract: T74LS27 T54LS27D2 3833A
Contextual Info: ss TRIPLE 3-INPUT NOR GATE DESCRIPTION The T54LS27/T74LS27 is a high speed TRIPLE 3-INPUT NOR GATE fabricated in LOW POWER SCH OTTKY technology. 1 1 B1 Plastic Package D1/D2 Ceramic Package M1 Micro Package C1 Plastic Chip Carrier ORDERING NUMBERS: T74LS27 C1

T74LS273B1

Abstract: OF IC 723 14 pin dip T74LS273 T54LS273
Contextual Info: T54LS273 T74LS273 S S 8-BIT REGISTER WITH CLEAR DESCRIPTION The T54LS273/T74LS273 is a high speed 8-Bit Re­ gister. The register consists of eight D-Type Flipflops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch lead spacing.

Contextual Info: T54LS279 T74LS279 QUAD SET-RESET LATCH DESCRIPTION The T54LS279/T74LS279 is a high speed QUAD SET-RESET LACTH fabricated in LOW POWER SCHOTTKY TECHNOLOGY. 1 B1 Plastic P a c k a g e D 1 /D 2 C e ra m ic P a ckag e V* M1 C1 Plastic C h ip C a rrier M icro P a c k a g e

T74LS27B1

Contextual Info: s s TRIPLE 3-INPUT NOR GATE DESCRIPTION The T54LS27/T74LS27 is a high speed TRIPLE 3-INPUT NOR GATE fabricated in LOW POWER SCH OTTKY technology. 1 1 B1 D1/D2 P lastic P ackage C eram ic Package M1 C1 M icro Package P lastic C hip C arrier O R D E RING N UM BE R S :

t74ls279b1

Abstract: T74LS279 truth table NOT gate 74 T54LS279D2 Scans-0011840
Contextual Info: T54LS279 T74LS279 QUAD SET-RESET LATCH DESCRIPTION The T54LS279/T74LS279 is a high speed QUAD SET-RESET LACTH fabricated in LOW POWER SCHOTTKY TECHNOLOGY. 1 B1 Plastic Package D1/D2 Ceramic Package *«✓ Ml Micro Package C1 Plastic Chip Carrier ORDERING NUMBERS:

Motorola transistor smd marking codes

Abstract: 7900801CA lm6482a 5962-8993001MIA replacement for 11c90 TRANSISTOR SMD MARKING CODE QA LM311 SMD JM38510/10305BEA LM714h Motorola semiconductor smd marking codes
Contextual Info: N MILITARY / AEROSPACE DESIGN/PROCESS CHANGE NOTIFICATION PCN Nr: 1998 Listing GIDEP Nr: GIDEP Category: Issued: 01/06/98 TRB Nr: This is to advise you that a Design and/or Process Change will be made to the following MIL/AERO product s : Product ID (Description):