T315 Search Results

Eupec t3159

Abstract: thyristor T3159N T3159 T3159N
Contextual Info: Datenblatt / Data sheet N Netz-Thyristor Phase Control Thyristor T3159N Elektrische Eigenschaften / Electrical properties Höchstzulässige Werte / Maximum rated values Periodische Vorwärts- und Rückwärts-Spitzensperrspannung Tvj = -40°C. Tvj max enndaten

Contextual Info: T315SYGWA/S530-E2 EVERLIGHT ELECTRONICS CO., LTD. Office: 7c Building ,Lian Hua Port lndustrial District, Lian Hua Shan Bonded Pricessing, Zone Pan Yu, Guang Zhou, China Tel: 020 84860913 , 84860914 Fax: (020) 84860600 http:\\www.everlight.com

T315

Contextual Info: Stan d ard Product February. 1994 LXT312 / T315 Low Power T1 PCM Repeaters General Description Features The LXT312 and T315 are integrated repeater circuits for T1 carrier systems. The L X T312 is a dual repeater and the T315 is a single repeater. The LXT312 and L X T315

Contextual Info: nay 2 0 P relim inary Info rm a tio n A pril, 1992 LXT312 / T315 Low Power T1 PCM Repeaters General Description Features The LXT312 and T315 are integrated repeater circuits for T1 carrier systems. T he L X T 312 is a dual repeater and the L X T 315 is a single repeater. The L X T 312 and LX T315

T296XW01

Abstract: T315XW01 40 pin tft connector 1366x768 au optronics led lcd AU Optronics t315xw01 FI-E30S SN75LVDS83
Contextual Info: Product Specifications 31.5” WXGA Color TFT-LCD Module Model Name: T315XW01 V0 * Preliminary Specifications ( ) Final Specifications Copyright AU Optronics, Inc. January, 2003 All Rights Reserved. T315XW01 V0 - Specs. Ver0.1 No Reproduction and Redistribution Allowed

Contextual Info: DATA SHEET APRIL, 1996 LXT312 / T315 Low-Power T1 PCM Repeaters/Transceivers %its'._ The LX T312 and LX T315 are integrated repeater/trans­ ceiver circuits f o r T l carrier system s. The LX T312 is a dual repeater/transceiver and the LX T315 is a single repeater/

Contextual Info: Preliminary Information LXT 312/ T315 Low Power T1 P C M Repeaters General Description Features The LXT312 and T315 are integrated repeater circuits for T1 carrier systems. The LXT312 is a dual repeater and theLX T315isa single repeater. The LXT312 and T315

Contextual Info: 6 APPROVED: DATE:_TITLE: —346 [8.80]|-— -293 [7.45]— -| O - CX .084 [2.15] art» .023 [0 .6 0 ]' .106 [2.70] 37 [3.50; .187 [4.75]“ —,244 [ 6.20]— - SECTION A -A t315 [8.00} 1Q7 -r023 [0.60] SPECIFICATIONS: Material:

T315

Contextual Info: APRIL 1997 Revision 2.1 LXT312 / T315 Low Power T1 PCM Repeaters / Transceivers Features Integrated repeater/transceiver circuit on a single C M O S chip The LX T312 and L X T315 are integrated repeater/trans­ ceiver circuits for T1 carrier system s. The L X T 3 12 is a dual

6206a

Abstract: K-Line transceiver w1p 84 st10f2xx sigma asc 333 24 pin K-line ST10F276E W1P 59 st10 Bootstrap st10273e
Contextual Info: ST10F276E 16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM Datasheet − production data Features • ■ ■ ■ ■ ■ Highly performance 16-bit CPU with DSP functions – 31.25ns instruction cycle time at 64MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit

diode T35 12H

Abstract: ST10F269Z2Q6 ST10F269Q ST10F269Z2T3 PQFP144 ST10F269 TQFP144 diode t318 BB126 st10 Bootstrap
Contextual Info: ST10F269 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM CAN1_RXD CAN1_TXD CAN1 CAN2_RXD CAN2_TXD CAN2 PEC Oscillator and PLL 16 Interrupt Controller

GPR circuit schematic diagram full

Abstract: DP43 T308 ST10F269-T6 ST*10f269-q3 m29F ST10F269-T3 TQFP144 f082h st10 Bootstrap
Contextual Info: ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM March 2003 FAIL-SAFE PROTECTION – PROGRAMMABLE WATCHDOG TIMER – OSCILLATOR WATCHDOG • ■ ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION – ON-CHIP PLL – DIRECT OR PRESCALED CLOCK INPUT

4 pin crystal 1mhz oscillator of KDS

Abstract: cei crystal oscillator clock M41T315V M41T315W M41T315Y M4TXX-BR12SH SOH28 KDS 1mhz oscillator KDS 32.768 KHz crystal for RTC
Contextual Info: T315Y* T315V/W SERIAL ACCESS PHANTOM RTC SUPERVISOR FEATURES SUMMARY • 3.0V, 3.3V, OR 5V OPERATING VOLTAGE ■ REAL TIME CLOCK KEEPS TRACK OF TENTHS/HUNDREDTHS OF SECONDS, SECONDS, MINUTES, HOURS, DAYS, DATE OF THE MONTH, MONTHS, and YEARS ■ AUTOMATIC LEAP YEAR CORRECTION

GPR circuit schematic diagram full

Abstract: ST10F269Z2q3 PQFP144 ST10 ST10F269 03 T48 regulator st10 Bootstrap
Contextual Info: ST10F269Z2Qx 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA August 2002 • ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD CAN1_TXD

transistor vergleichsliste

Abstract: Transistor Vergleichsliste DDR telefunken transistoren VALVO BSW69 vergleichsliste DDR vergleichsliste transistor BC-148 rft transistoren Transistoren DDR
Contextual Info: TRANSISTOR VERGLEICHSLISTE Teil 2: Siliziumtransistoren r a d io - t e le v is io n Transistorverglèich& liste T eil 2 : S iliziu in tra n sistoren TRA N SISTO R, V ER G LEICH S LIS T E Teil 2: Siliziumtransistoren DER D EU TSCH EN M IL IT Ä R V E R L A G

A42 B331

Abstract: CA91C860B-40IQ CA91C860B-40CQ CA91C860B-50CQ tea 1601 t CA91C860B a44 b331 CA91C860 T337A CA91L860B-50CE
Contextual Info: QSpan CA91C860B, CA91L860B PCI to Motorola Processor Bridge Manual http://www.tundra.com The information in this document is subject to change without notice and should not be construed as a commitment by Tundra Semiconductor Corporation. While reasonable precautions have been taken, Tundra

st10f276 jtag

Abstract: w1p 59 ST10F276 st10 Bootstrap EF52 transistor w2P w1p 83 W1P 76 transistor LQFP144 ST10
Contextual Info: ST10F276 16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM Features • ■ ■ ■ ■ ■ Highly performant 16-bit CPU with DSP functions – 31.25ns instruction cycle time at 64MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit

82c597

Abstract: 83C206 Cyrix 486 dx2 CX486 386DX CY82C597 intel 486 dx4 t324 amd 386 PC MOTHERBOARD diagram cyrix DX2
Contextual Info: PRELIMINARY CY82C597 386/486 Green Chip Set D Features Page mode DRAM controller supports mixture of 256KB/512KB/1MB/2MB/ 4MB/16MB devices D D MicrosoftR APM support 11 event detectors and 5 userĆdefined timers D D 160ĆPin single chip PQFP Supports PC/AT compatible systems

Contextual Info: * 1 SCS-THOMSON / R a n a @ i i L i g r e w n e § S T L C 5 4 1 1 2B1Q U INTERFACE DEVICE ADVANCE DATA G ENERAL FEATURES • SINGLE CHIP 2B1Q LINE CODE TRANS­ CEIVER ■ SUITABLE FOR BOTH ISDN AND PAIR GAIN

tmp-68303f-16

Abstract: TLCS-68000 tmp68303 TMP68303F-16 TMP68301
Contextual Info: TOSHIBA TMP68303 Part 4 TMP68303F-16 1. Introduction TMP68303 is a high-speed, high-function 16-bit microprocessor developed for applications in control devices. TMP68303 uses the 68HC000, the CMOS version of the 68000, as its core processor. It also includes

epson 0x95

Abstract: CBW15 S1R72003F00B100 CBW18 equivalent transistor t205 t324 t393 transistor t349 00A1 CS01
Contextual Info: MF1495-02 USB2.0 Device Controller S1R72003 Technical Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.

82C556M

Abstract: OCH168 82C557M 82C558 OPTi 82C546 82c556 CI VIPER 17H 82C558M opti 82c556 IBM motherboard schematics
Contextual Info: twain 82C556M/82C557M/82C558M Viper-M Multimedia Chipset Preliminary Data Book Revision: 1.0 912-2000-010 April 1995 • RODm ^b □ Powered by ICminer.com Electronic-Library Service CopyRight 2003 038 Copyright Copyright 1995, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored

CX486

Abstract: 83C206 82C596 386D taga7 cyrix DX2 Cyrix 486 dx2 OT502 BIOS source code 386 3118D
Contextual Info: p yp: v « *1 X X PRELIMINARY CY82C597 - 386/486 Green Chip Set Features • 60-Pin single chip PQFP • Supports PC/AT compatible systems at 25/33/40/50 • Supports AMD, Cyrix level 1 w rite-back CPU • W rite-Back/W rite-Through cache with 32KB/64KB/128KB/256KB/512KB/1 MB cache size

GPR circuit schematic diagram full

Abstract: ST10F269-Q3 ST10F169 PQFP144 DCMI timing specification st10 Bootstrap gpr schematic diagram EA99
Contextual Info: ST10F269-Q3 16-BIT MCU WITH 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256KByte FlashMemory 2K Byte Internal RAM 16 CPU-Coreand MACUnit Watchdog 16 10KByte XRAM PEC 16 16 8 16 Interrupt Controller XTAL1 Port 6 8 Port5 16