T17S Search Results

Contextual Info: TELEFUNKEN ELECTRONIC filC ]> • éHSOCHb 000L>125 b ■ ALGG 7^-2.S'-/G T175N T yp enrelhe/Typ e ränge T17S N Elektrische Eigenschaften Electrical properties Höchstzulässige W erte M axim um perm issible values U d b m i U r r m Periodische Vorwärts- u n d

C161U

Abstract: stk 462 audio amplifier circuit diagram t56cc C167 loader C167CS STK 4167 STK 442 130 AC97 C166 T6UD6
Contextual Info: Da t a Sh e et , D S 2 , Ap r il 2 0 0 1 C161U Embedded C166 with USB,USART and SSC Version 1.3 W i r ed Communications N e v e r s t o p t h i n k i n g . Edition 2001-04-5 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

Contextual Info: C h a pt er E10 Floating-Point Unit E10.1 Overview of the MB86936 Floating-Point Unit The MB86936 FPU fully conforms to the A N SI/IEEE Standard 754-1985, the SPARC Architecture Version 8 specification, and he SPARC IEEE754 Implementation Recommendation except for the Nonstandard FP (NS=1 mode implementation.

Contextual Info: MB86935 Bus Interface Unit H3.1 Overview of Bus Interface Unit The BIU on the MB86935 includes all the features of the MB86930, and in addition offers the following: • Option to run core at double the frequency of the Bus Interface Unit, • Four-word burst mode for instruction fetches and data loads,

Contextual Info: FUJITSU March 1992 Edition 1.0 DATA SHEET M B 8 1 4 1 O O A -6 0 /-7 0 /-8 0 CMOS 4M x 1 BIT FAST PAGE MODE DRAM CMOS 4,194,304 x 1 BIT FAST PAGE MODE DYNAMIC RAM The Fujitsu MB814100A is a fully decoded CMOS Dynamic RAM DRAM that contains a total of 4,194,804 memory cells in a x1 configuration. The MB814100A features a “fast

Contextual Info: FUJITSU S EM ICO NDUCTO R DATA SHEET ASSP Communication Control Data Link Controller DLC MB89374 • DESCRIPTION The MB89374 Data Link Controller (DLC) controls transfer of serial data in accordance with Bit Oriented Protocol (BOP). It supports protocols such as High level Data Link Control (HDLC) (the BOP mode) and Serial Data

7006C

Abstract: TOA8
Contextual Info: '- / Ú - FUJITSU S3E L TD 3 7 4 cl75b G D 0 3 3 S S D .2 3 ^ /7 TOb » F C A J June 1992 Edition 1.0 FUJITSU DATA SHEET M B 8 1 4 2 6 0 A -70/-80/-10 CMOS 256K X 16 BIT FAST PAGE MODE DYNAMIC RAM CMOS 262,144 x 16 bit Fast Page Mode Dynamic RAM The Fujitsu MB814260A is a fully decoded CMOS Dynamic RAM DRAM that contains 4,194,304

ntc 47d

Abstract: ti75b NTC 4.7d -7 BIG IP F5 D30 ntc 5 om d21 ufc 101 vc
Contextual Info: MB86683B Edition 2.0 1. OVERVIEW The NTC is a full duplex device which can be used to provide broadband term ination functions in a variety of applications. Its primary use is for term inating the user or network ends of a user-netw ork interface based on ITU-T,

CG46713

Abstract: CG46194 CG46533 CG46134 CG46104
Contextual Info: FUJITSU Novem ber 1995 Edition 1.5 DATA S H E E T : CG/CE46 0.65 Micron High Performance, Low Power CMOS Gate Arrays Description The Fujitsu CG46 is a high performance, 0.65 |im drawn channel length, digital CMOS gate array family. The CE46 is a 0.65 urn drawn channel length, digital CMOS embedded gate array

B86931

Abstract: MB86931
Contextual Info: C h a pter A4 M B86931 Serial Data Transmitters And Receivers The MB86931 features two independent serial communication units designated SDTRO and SDTR1. The SDTRs support synchronous and asynchronous data transfer modes, and are program-compatible with existing industry-standard

Contextual Info: ADVANCE 4 MEG X 64 DRAM SODIMM M IC R O N I TF.CHNOLOOY, INC. SMALL-OUTLINE DRAM MODULE MT4LDT464H X S FEATURES PIN ASSIGNMENT (Front View) • JEDEC- and industry-stand ard pinout in a 144-pin, sm all-outline, dual in-line m em ory m odule (DIMM) • 32MB (4 M eg x 64)

Contextual Info: ZI LO G INC 03 D È I T T Ö M O M B □□□fllSS □ | 9984043 ZILOG INC 03E 08155 Z8030 M ilitary T-iS-Zl-oy Z8000 Z-SCC Serial Communications Controller Military Zilog Electrical Specification July 1985 FEATURES • Two independent, 0 to 1.5M bit/second, full-duplex

AI23

Abstract: MSM66591 5P10 1558 bcb 0P97 11P11 AD162 AD164 I0044 P120A
Contextual Info: ¡ MSM66591 ユーザーズマニュアル CMOS 16bit マイクロコントローラ 沖電気工業株式会社 '99•3作成 ご 注 意 1. 本書に記載された内容は製品改善及び技術改良等により将来予告なしに変更することがありま

MCW D15

Abstract: ST10 TQFP-100 T11C
Contextual Info: ST10R262 16-BIT MCU WITH ON-CHIP MAC PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ High Performance CPU ■ Multiply-Accumulate unit MAC ■ 16-bit CPU with 4-stage pipeline and 40ns instruction cycle time at 50-MHz CPU clock ■ Register-based architecture

88C166

Abstract: 80C166 Q67120-C850 Q67120-C934 88C166-5M t5cc C16x Family Instruction Set Manual uprog
Contextual Info: C16x-Family of High-Performance CMOS 16-Bit Microcontrollers Preliminary SAB 88C166 W ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● SAB 88C166(W) 16-Bit Microcontrollers with 32 KByte Flash EPROM

7S32C

Abstract: SMC6200
Contextual Info: SMC626X Famil 4-BIT MICROCOMPUTERS • INTRODUCTION The SMC626X family of single chip microcomputers features a 4-bit SMC6200 core CPU, ROM 12 bits per word , RAM (4 bits per word), LCD Driver/Controller, input ports, output ports, I/O ports, timers, serial ports,

sy hs 220

Abstract: T17S h3g2
Contextual Info: HARRIS æ H S - 1 1 2 0 R H S E M I C O N D U C T O R Radiation Hardened, Ultra High Speed Current Feedback Amplifier with Offset Adjust March 1996 Features Description • Circuit Will Be Supplied to a SMD and QM L Class V The HS-1120RH is a radiation hardened, high speed,

D1186

Abstract: MB89251 REM BB2
Contextual Info: MB86940 FUJITSU 930 Series Companion Chip DATASHEET FEA TU RES AUGUST 1994 _ • Integrated Interrupt Request Controller, Timer, and Serial D ata Transmitter/Receiver • 930 Series processor interface • 40 MHz operation

Contextual Info: November 1995 Edition 1.0 FUJITSU PRODUCT PROFILE SHEET MB85344C-60/-70 CMOS 2M X 32 Hyper Page Mode DRAM Module CMOS 2,097,152 x 32 Bit Hyper Page Mode DRAM Module The Fujitsu MB85344C is a fully decoded, CMOS dynamic random access memory DRAM module consisting of sixteen MB814405C devices. The MB85344C is

Contextual Info: cp DS04-21329-2E DATA SHEET FUJITSU ASSP forDTS BiCMOS 1.1 GHz PLL Frequency Synthesizer M B 1 5 A 0 3 • DESCRIPTION The MB15A03 is a Phase Locked Loop PLL frequency synthesizer LSI operating at up to 1.1 GHz. It incorporates a dual-modulus prescaler allowing either a 64/65 or a 128/129 frequency division to be selected.

ST10 PROGRAMMING C basic

Abstract: OFF32 ST10F276 ST10
Contextual Info: AN2555 Application note Porting an application from the ST10F269Zx to the ST10F276Z5 Introduction The ST10F276Z5 is a member of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers. It is functionally upward compatible with the ST10F269Zx.

oki m66591

Abstract: CHAPTER19 MSM66Q591 pc817 s6 d00030 M66591 AI23 FJUL66591-66592-02 AD162 AD164
Contextual Info: お客様各位 資料中の「沖電気」「ＯＫＩ」等名称の OKI セミコンダクタ株式会社への変更について 2008 年 10 月 1 日を以って沖電気工業株式会社の半導体事業は OKI セミコン ダクタ株式会社に承継されました。 従いまして、本資料中には「沖電気工業株

Contextual Info: - PRELIM IN ARY - March 1995 Edition 2.0 FUJITSU PRODUCT PROFILE SHEET M B 8 141 OOC-60/-70 CMOS 4M X 1 BIT FAST PAGE MODE DRAM CMOS 4,194,304 x 1 bit Fast Page Mode Dynamic RAM The Fujitsu MB814100C is a fully decoded CMOS Dynamic RAM DRAM that contains a total of

oki m66591

Abstract: ML66Q592 MSM66Q591 msm66591 MAC66K rl66 AI23 66q592 FEUL66591-66592-01 TMR15
Contextual Info: FEUL66591-66592-01 MSM66591/ML66592 User's Manual CMOS 16-bit microcontroller Issue Date: Mar. 4, 2002 Preface This document describes the hardware of the 16-bit microcontrollers MSM66591/ML66592 that employ Oki-original CPU core nX-8/500S. Shown below are the related manuals. Refer