B86931
Abstract: MB86931
Contextual Info: C h a pter A4 M B86931 Serial Data Transmitters And Receivers The B86931 features two independent serial communication units designated SDTRO and SDTR1. The SDTRs support synchronous and asynchronous data transfer modes, and are program-compatible with existing industry-standard
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b86931mb86931a4-23a4-24 |
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Contextual Info: M686931 930 Series 32-BIT RISC EMBEDDED PROCESSOR/ INTERRUPT CONTROLLER/TIMER/USART _ FUJITSU MAY 24, 1 9 9 4 FEATURES • 40 M Hz 25ns/cycle operating frequency • SPARC high performance RISC processor - 2 Kbytes 2-w ay set associative instruction and
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m68693132-bit25ns/cycle |
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mb86901
Abstract: MB86902 Fujitsu MB86900 mb86900 MB89251 CE109
Contextual Info: B86931_ FUJITSU 9 SPARCIite 32-BIT RISC EMBEDDED PROCESSOR/ INTERRUPT CONTROLLER/TIMER/USART M A Y 25,1994 FEATURES_ _ • 40 MHz 25ns/cycle operating frequency • S P A R C high performance R IS C processor
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32-bitmb86931_25ns/cyclemb86901+5mb86902fujitsu mb86900mb86900mb89251ce109
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mpc 7
Abstract: MB86931
Contextual Info: MB86933H FUJITSU 930 Series 32-BIT RISC EMBEDDED PROCESSOR NOVEMBER 7, 1994 PRELIMINARY INFORMATION [ features • 20 M H z 50ns/cycle operating frequency • SPA RC V8 h ig h -p erfo rm an c e R ISC architecture • 1 K Byte, direct m apped instruction cache
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mb86933h32-bit86933hmpc 7+1mb86931
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