T08S Search Results
T08S Price and Stock
onsemi 74ACT08SCX- Tape and Reel (Alt: 74ACT08SCX) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74ACT08SCX | Tape & Reel | 15,000 | 39 Weeks | 2,500 |
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74ACT08SCX | Cut Tape | 18,801 | 5 |
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| 74ACT08SCX | Tape & Reel | 18,801 | 100 |
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74ACT08SCX | 1 |
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74ACT08SCX | 2,500 |
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74ACT08SCX | 40 Weeks | 2,500 |
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74ACT08SCX | 4,750 |
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onsemi 74ACT08SC- Rail/Tube (Alt: 74ACT08SC) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74ACT08SC | Tube | 7,581 | 1 |
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74ACT08SC | Bulk | 245 | 1 |
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74ACT08SC | 26 | 1 |
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74ACT08SC | 12 Weeks | 55 |
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74ACT08SC | 3,575 | 13 Weeks | 55 |
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Bourns Inc CDSOD323-T08S- Tape and Reel (Alt: CDSOD323-T08S) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CDSOD323-T08S | Tape & Reel | 6,000 | 16 Weeks | 12,000 |
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CDSOD323-T08S | Reel | 12,000 |
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CDSOD323-T08S | 500 |
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CDSOD323-T08S | 1 |
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CDSOD323-T08S | Tape & Reel | 17 Weeks | 3,000 |
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CDSOD323-T08S | 500 |
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Amphenol Corporation PT08SE-14-19P-424- Bulk (Alt: PT08SE-14-19P-424) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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PT08SE-14-19P-424 | Bulk | 2 | 18 Weeks | 1 |
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Glenair Inc IPT08SE20-41PSRPOWER PRODUCTS - BLQ - 26482 CONNECTORS - Bulk (Alt: IPT08SE20-41PSR) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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IPT08SE20-41PSR | Bulk | 5 Weeks | 1 |
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IPT08SE20-41PSR | Bulk | 1 |
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IPT08SE20-41PSR |
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T08S Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: MITSUBISHI LSIs M6MGB/T08S2ATP 8388608-BIT 1 M x 8-BIT/512k x 16-BIT CMOS 3.3V-ONLY FLASH MEMORY & 2097152-BIT (256k x 8-BIT) CMOS STATIC RAM MCP (Multi Chip Package) FEATURES DESCRIPTION The MITSUBISHI M6MGB/T08S2ATP is a Multi Chip Package (MCP) that contents 8-Mbit Flash memory and |
OCR Scan |
m6mgb/t08s2atp8388608-bit8-bit/512k16-bit+5 | |
mcl psc-2-1
Abstract: mcl psc T05SC
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OCR Scan |
t05sct08sclps-109sc-2-11+8 | |
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Contextual Info: MITSUBISHI LSIs M6MFB/T08S2TP 8388608-BIT 1 M x 8-BIT/512k x 16-BIT CMOS 3.3V-ONLY FLASH MEMORY & 2097152-BIT (256k x 8-BIT) CMOS STATIC RAM MCP (Multi Chip Package) DESCRIPTION FEATURES The MITSUBISHI M6MFB/T08S2TP is a Multi Chip Package (MCP) that contents 8-Mbit Flash memory and |
OCR Scan |
m6mfb/t08s2tp8388608-bit8-bit/512k16-bit+5 | |
an8040
Abstract: IC/T800
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m6mfb/t08s2tp8388608-bit8-bit/512k16-bit+7 | |
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Contextual Info: MITSUBISHI LSIs M6MFB/T08S2TP 8388608-BIT 1 M x 8-BIT/512k x 16-BIT CMOS 3.3V-ONLY FLASH MEMORY & 2097152-BIT (256k x 8-BIT) CMOS STATIC RAM MCP (Multi Chip Package) DESCRIPTION FEATURES The MITSUBISHI M6MFB/T08S2TP is a Multi Chip Package (MCP) that contents 8-Mbit Flash memory and |
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m6mfb/t08s2tp8388608-bit8-bit/512k16-bit+5 | |
ladder networkContextual Info: Model TxxS Vishay Techno Single-In-Line, Coated, 4 Bits to 8 Bits R/2R Ladder Networks APPLICATIONS R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy on Linearity: ± 1/2 LSB. Ladder Network Resistance Tolerance: ± 2 %. |
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08-apr-05ladder network | |
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Contextual Info: m 3W A Y-00 10 kHz to 4.2 GHz case style selection LRPS-3 outline drawings see Table of Contents m PSC-3 ISOLATION dB L MODEL NO. M° INSERTION LOSS, dB Abov»4.8dB L U M° Typ.Min. Typ.Mln. Typ.Mln. Typ. Max. ZN3PD ZFSC-3 SCP-3 FREQ. RANGE MHz AMPLITUDE PHASE |
OCR Scan |
t08sc-3psc-3-1-75psc-3-1-75-2psc-3-13+5 | |
T07SContextual Info: TxxS Vishay Techno Thick Film Resistor Networks, Single-In-Line, Conformal Coated SIP FEATURES • 4 bit to 8 bit, R/2R ladder networks for D/A and A/D converter with bi-polar or CMOS switches • Reduces total assembly costs • Resistor element protected by tough epoxy |
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2002/95/ec11-mar-11t07s | |
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Contextual Info: Model TxxS Vishay Techno Single-In-Line, Coated, 4 Bits to 8 Bits R/2R Ladder Networks APPLICATIONS R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy on Linearity: ± 1/2 LSB. Ladder Network Resistance Tolerance: ± 2 %. |
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01-aug-05 | |
D406
Abstract: VHC 016 vhc*t08 74VHC08 74VHC08M 74VHC08MTC 74VHC08N 74VHC08SJ 74VHCT08 M14A
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74vhc0874vhct08vhc/vhct08d406+7 | |
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Contextual Info: Models TxxS Vishay Techno Single-In-Line, Coated, 4 Bits to 8 Bits R/2R Ladder Networks APPLICATIONS R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches. ELECTRICAL SPECIFICATIONS Ladder Network Accuracy on Linearity: ± 1/2 LSB. |
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100ppm/50mw/element23-sep-99 | |
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Contextual Info: TxxS Vishay Techno Thick Film Resistor Networks, Single-In-Line, Conformal Coated SIP FEATURES • 4 bit to 8 bit, R/2R ladder networks for D/A and A/D converter with bi-polar or CMOS switches • Reduces total assembly costs • Resistor element protected by tough epoxy |
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2002/95/ec2011/65/eu12-mar-12 | |
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Contextual Info: A COMPANY MODEL TxxS, R/2R Ladder Networks OF W TECHNO S IP , C o a te d , 4 B its to 8 B its A P P L IC A T IO N S R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches E L E C T R IC A L S PE C IFIC A TIO N S Ladder Network Accuracy on Linearity: ± 1/2 LSB. |
OCR Scan |
100ppm/100kl2 | |
T08LA3C
Abstract: T28LA3C T12LA3C T25SA3C T16SA3C T35LA3C T18LA3C T38SA3C T15LA3C t42la3c
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t04lla3ct06lla3ct08lla3ct10lla3c+13 | |
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Contextual Info: D . ,c. iq q q Revised February 1999 SE M CONDUCTOR TM MM74HCT08 Quad 2-Input AND Gate General Description The M M 74H C T08 is a logic function fabricated by using advanced silicon-gate C M OS technology w hich provides the inherent benefits of C M OS— low quiescent power and |
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mm74hct08 | |
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Contextual Info: Revised O ctober 1998 74AC08 • 74ACT08 Quad 2-Input AND Gate General Description Features T h e A C /AC T08 contains four, 2 -input AN D gates. • Ice reduced by 50% on 74A C only ■ O utputs source/sink 24 mA Ordering Code: Order Number Package Number |
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74ac0874act08t08scc08sc+4 | |
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Contextual Info: MODEL TxxS R/2R Ladder Networks C o a te d S IP , 4 B its to 8 B its A P P L IC A T IO N S R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELE C T R IC A L S P E C IF IC A T IO N S Ladder Network Accuracy on Linearity: ± 1/2 LSB. |
OCR Scan |
100ppm/100ku200kl1 | |
ISO 8877
Abstract: ISO 8877 isdn ISO10173 BUK5
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00x135nss00x105nss0796fiso 8877+3 | |
P1-25-EA-SVB
Abstract: Moeller T0-2-8900 Moeller P1-32 P1-32-EA-SVB P3-63-EA-SVB T0-2-1-EA-SVB moeller VDE 0660 iec 947-3 TM-2-8230 T0-2-15679 moeller VDE 0660 typ 156
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hpl0211-2001/2002p1-25-ea-svbmoeller t0-2-8900moeller p1-32+7 | |
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Contextual Info: TxxS Vishay Techno 厚膜电阻器网络,单排,保形涂层 SIP 特点 • 4位至8位,R/2R梯形网络,用于D/A 和A/D双极 转换器或 CMOS 开关 • 降低总组装成本 • 电阻器通过环氧树脂保形涂层保护 • 厚膜电阻元件 |
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2002/95/ec2011/65/eujs709a02-oct-12 | |
T5B-4-8213
Abstract: Moeller P1-32 T0-3-8212 T03-15 T0-2-15679 T5-4-8213 TM-2-8550 T0-3-8216 TM-2-8231 T5B-3-8212
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hpl0211-2004/2005rmq16t5b-4-8213moeller p1-32+8 | |
Mini-Circuits Model SAT-3
Abstract: 12W 97 2SDR-230 LMX-113 TIA-1000-IR8 SYPQ-21 FPQ-475 L1042 LRMS-5LH PDC 140M
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OCR Scan |
zfsw-2-462fswha-1-20zmsw-11112msw-1211+13 | |
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Contextual Info: s e m ic o n d u c t o r Revised N ovem ber 1999 74AC08 • 74ACT08 Quad 2-Input AND Gate General Description Features The AC /AC T08 contains four, 2-input AND gates. • lc c reduced by 50% on 74A C only ■ O utputs source/sink 24 mA Ordering Code: |
OCR Scan |
74ac0874act0814-leads-120+5 | |
0990 bnContextual Info: TxxS Vishay Techno Thick Film Resistor Networks, Single-In-Line, Coated, 4 Bits to 8 Bits APPLICATIONS R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy on Linearity: ± 1/2 LSB |
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08-apr-050990 bn | |