SYS13 Search Results

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

7813 Texas Instruments Transistor

Abstract: TMS320C6000 TMS320C6474 C6000 C6474 C64X DDR2-667 SPRS552H BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

transistor d880

Abstract: BR17
Contextual Info: TMS320C6474 www.ti.com SPRS552E – OCTOBER 2008 – REVISED APRIL 2010 TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

Contextual Info: General Features • Transmitter with Microcontroller Consisting of an AVR Microcontroller and RF • • • • • • • • • • • • • • • • Transmitter PLL in a Single QFN24 5 mm x 5 mm Package Pitch 0.65 mm – f0 = 429 MHz to 439 MHz

ld1.8

Abstract: 9421 motorola 9612 c5 ALL DATA SHEET T8110 UPA11 CTD31
Contextual Info: Advisory April 2001 Ambassador T8110 PCI-Based H.100/H.110 Switch and Packet Payload Engine Introduction The purpose of this advisory is to provide information on two device issues found after testing models of the T8110 Ambassador device. T8110 Model Testing

ATA874x

Abstract: 4 MHz crystal KDS 2K 9151a ATA8401 ATA8202 ATA8204 ATA8402 ATA8742 ATA874x MCU 433.92 MHZ, 5V, ASK modulation RF RECEIVER MODULE
Contextual Info: General Features • Transmitter with Microcontroller Consisting of an AVR Microcontroller and RF • • • • • • • • • • • • • • • • Transmitter PLL in a Single QFN24 5 mm x 5 mm Package Pitch 0.65 mm – f0 = 429 MHz to 439 MHz

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

CSR BC5

Abstract: TX01 TMS320C64x DSP Megamodule Reference Guide
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Contextual Info: CS5376A Low-power, Multi-channel Decimation Filter Features Description 1- to 4-channel Digital Decimation Filter The CS5376A is a multi-function digital filter utilizing a low-power signal processing architecture to achieve efficient filtering for up to four ∆Σ modulators. By

transistor D880 circuit diagram application

Abstract: GP-07 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

SCR RC10

Abstract: tim02 a15 c15 106c 12p 02B07FFF 02C30000 fcbga package weight TMS320C6000 C6000 0257FFFF LOG RX2 0808
Contextual Info: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

SPRM316

Abstract: C6000 DDR2-533 TCI6486 TMS320C6000 TMS320TCI6486 CSR BC5 TMS320TCI6486ZTZ 070CH
Contextual Info: TMS320TCI6486 www.ti.com SPRS300I – FEBRUARY 2006 – REVISED OCTOBER 2009 TMS320TCI6486 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6486 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

Contextual Info: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

atmel H116

Abstract: Atmel H122 atmel h102
Contextual Info: CS5378 Low Power Single Channel Decimation Filter Features Description Single Channel Digital Decimation Filter Multiple On-Chip FIR and IIR Coefficient Sets Programmable Coefficients for Custom Filters Synchronous Operation Integrated PLL for Clock Generation

2e58

Abstract: BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

log tx 1044

Abstract: TR74 71011
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

Contextual Info: General Features • Transmitter with Microcontroller Consisting of an AVR Microcontroller and RF • • • • • • • • • • • • • • • • Transmitter PLL in a Single QFN24 5 mm x 5 mm Package Pitch 0.65 mm – f0 = 868 MHz to 928 MHz

CS5376-BS

Abstract: CS10 CS11 CS5371 CS5372 CS5376 CS5371 HOW CHECK
Contextual Info: CS5376 Low Power Multi-Channel Decimation Filter Features Description l 1 to 4 Channel Digital Decimation Filters s Coefficient Programmable FIR Filters The CS5376 is a multi-function digital filter utilizing a lowpower signal processing architecture to achieve efficient

RF transmitter 433.92 3 pin 5v

Abstract: ATA8743 ATA8403 micro motor controller ATA8742 ATA8205 T5750 keyless-entry ATA874x MCU
Contextual Info: General Features • Transmitter with Microcontroller Consisting of an AVR Microcontroller and RF • • • • • • • • • • • • • • • • Transmitter PLL in a Single QFN24 5 mm x 5 mm Package Pitch 0.65 mm – f0 = 868 MHz to 928 MHz

logic H113

Abstract: 40298 atmel 718 implementing FIR and IIR digital filters AT25128 AT25640 CS3301 CS3302 CS4373 CS5371
Contextual Info: CS5378 Low-power Single-channel Decimation Filter Features Description z Single-channel Digital Decimation Filter ΠMultiple On-chip FIR and IIR Coefficient Sets ΠProgrammable Coefficients for Custom Filters ΠSynchronous Operation z Integrated PLL for Clock Generation

D880 TRANSISTOR

Abstract: A00C equivalent transistor A214 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns