SYNCHRONIZER Search Results

SN54120

Abstract: SN74120
Contextual Info: TTL TYPES SN54120, SN74120 DUAL PULSE SYNCHRONIZERS/DRIVERS MSI B U L L E T I N N O . D L -S 7 2 1 1 8 3 7 , S E P T E M B E R 1 9 7 1 — R E V IS E D D E C E M B E R 1 9 7 2 S N S 41 2 0 . . . J OR W PACKAGE Generates Either a Single Pulse or Train of Pulses

Contextual Info: SN54120, SN74120 DUAL PULSE SYNCHRONIZERS/DRIVERS SEPTEMBER 1971 - REVISEO M A R C H 1 9 8 8 SN54120 . . . J PACKAGE Generates Either a Single Pulse or Train of Pulses Synchronized with Control Functions SN74120 . . . N PACKAGE {T O P V IE W Ideal for Implementing Sync-Control Circuits

Contextual Info: CDCM7005 www.ti.com SCAS793B – JUNE 2005 – REVISED OCTOBER 2005 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER GND GND GND GND GND GND C VBB GND AVCC AVCC AVCC AVCC AVCC GND STATUS_ REF or PRI_SEC_ CLK STATUS_ D VCXO_IN GND GND GND GND GND

C28H

Abstract: TS301
Contextual Info: 4 ^ ?< ?, SSI 532 Sumsiishiu' Data Synchronizer/ 2,7 RLL ENDEC INNOVATORS IN^INTEGRATION Preliminary Data February 1987 DESCRIPTION FEATURES The SSI 532 Data Synchronizer / 2, 7 RLL END EC provides data recovery and data encoding for storage systems which employ a 2, 7 RLL encoding

32D5362

Abstract: 32D535 32D5321 5351A 32D532 SC111
Contextual Info: Data Synchronizer Family Application Notes S SI 32D5321/5322 SSI 32D 535/5351 S SI 32D5362 R E F E R E N C E O S C IL L A T O R An internal reference oscillator generates the standby reference for the PLL. For the 32D5321/5322 and the 32D535/5351, a series resonant crystal of twice the data rate should be used between XTAL1 and XTAL2. For

X-TAL reference

Abstract: ra7d
Contextual Info: SSI 32D539 ¿ m m s y s b m s Data Synchronizer & 1,7 RLL ENDEC ' A TDK G rou p /C o m pany Preliminary Data December 1991 DESCRIPTION Fast a c q u is itio n phase locked lo o p w ith zero The circuit is intended to be used as a data/clock recovery circuit for 1, 7 RLL code in hard disk drive

CDCM7005HFG-V

Abstract: smd y1a
Contextual Info: CDCM7005-SP www.ti.com . SGLS390A – JULY 2009 – REVISED AUGUST 2009 3.3-V HIGH PERFORMANCE RAD-TOLERANT CLASS V, CLOCK SYNCHRONIZER AND

Contextual Info: AV9170 Integrated •i fCircuit i m n ’i Systems, Inc. Clock Synchronizer and Multiplier General Description Features The AV9170 generates an output clock which is synchronized to a given continuous input clock with zero delay ±lns at 5V Vdd - Using ICS’s proprietary phase-locked loop (PLL) ana­

8x16x16

Contextual Info: TRF4903 SINGLEĆCHIP MULTIBAND RF TRANSMITTER SWRS023B − MAY 2004 − REVISED MARCH 2005 D Single-Chip RF Transmitter for 315-MHz, D D D D D D D Programmable Brownout Detector D Integrated Data Bit Synchronizer and Baud 433-MHz, 868-MHz, and 915-MHz Industrial,

Contextual Info: SY58052AU Ultra-Precision CML Data and Clock Synchronizer with Internal Input and Output Termination Precision Edge General Description The SY58052AU is an ultra-fast, precision, low jitter datato-clock synchronizer with a guaranteed maximum data throughput of 10.7Gbps and a maximum clock of 10.7GHz.

LVDS register

Contextual Info: CDCE72010 SCAS858C – JUNE 2008 – REVISED JANUARY 2012 www.ti.com Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor Check for Samples: CDCE72010 FEATURES 1 • • • • • • • • • • • • • • High Performance LVPECL, LVDS, LVCMOS

LP3933

Abstract: LP3936 LP3950 LP3950SL LP3950SLX
Contextual Info: LP3950 Color LED Driver with Audio Synchronizer General Description Features The LP3950 is a color LED driver with a built-in audio synchronization feature for any analog audio input such as polyphonic ring tones and MP3 music. LEDs can be synchronized to an audio signal with two methods - amplitude

ZL30142GGG2

Abstract: ZL30142 GR-1244 GR-253
Contextual Info: ZL30142 SyncE SONET/SDH G.8262/Stratum 3 System Synchronizer Short Form Data Sheet February 2009 Features • Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks EEC option 1 and 2 • Supports the requirements of Telcordia GR-1244

ZL30321

Abstract: ZL30116 GPON ONT ONU H1-LOCK GR-253 ZL30121 ZL30130 ZL30138 ZL30321GGG "network interface cards"
Contextual Info: ZL30321 GbE/SONET/SDH/PDH Network Interface Synchronizer Short Form Data Sheet February 2008 Features • Ordering Information Provides synchronous clocks for network interface cards that support synchronous Ethernet SyncE in addition to telecom interfaces (e.g. T1/E1,

HD15303

Contextual Info: HD 153035F 56-Mbps Data Channel Processor # H ITA CH I _ Under Development Description The HD153035F is a 56 Mbps 1-7 ENDEC data separator with built-in read pulse detector, active filter, frequency synthesizer and synchronizer developed for use in magnetic disk drives.

siemens Logo 230 rc manual

Abstract: GR-1244-CORE MT9044 MT9044AL MT9044AP TR62411
Contextual Info: MT9044 T1/E1/OC3 System Synchronizer Data Sheet Features November 2003 • Supports AT&T TR62411 and Bellcore GR-1244CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces

SY02-MFTC

Abstract: 33172 regenerator Crystal 10mhz RALTRON
Contextual Info: SYNCHRONOUS EQUIPMENT LOW IN/OUTPUT FREQUENCY CLOCK REGENERATOR LVPECL/LVCMOS OUTPUT SY02-MFTC Date: January 7,2004 SY02-MFTC • INTRODUCTION The SY02-MFTC is a high frequency crystal-based PLL synchronizer designed as a module level subsystem for easy incorporation into telecommunication equipment

endat

Abstract: 7301A
Contextual Info: VM7301 VTC Inc. ZDR DATA SEPARATOR / SYNTHESIZER / ENCODER-DECODER WITH WRITE PRECOMPENSATION V a lu e th e C u s to m e r PRELIMINARY FEA TU R ES Data Synchronizer 1,7 Encoder/Decoder Frequency Synthesizer Write Precompensation 3 - 24 Mbits/sec Data Rate

Contextual Info: SYNCHRONOUS EQUIPMENT HIGH FREQUENCY CLOCK/SYNCHRONIZER - SY0002B SY0002B Date: June 15, 2001 PRELIMINARY • INTRODUCTION The SY0002B is a high frequency crystal-based PLL synchronizer designed as a module level subsystem for easy incorporation into telecommunication equipment.

disadvantage of numeric water level indicator

Contextual Info: Dual/Quad Input Network Clock Generator/Synchronizer AD9547 FEATURES APPLICATIONS Supports Stratum 2 stability in holdover mode Supports reference switchover with phase build-out Supports hitless reference switchover Automatic/manual holdover and reference switchover

GR-253-CORE

Abstract: ZL30119 ZL30119GGG ZL30119GGG2 "network interface cards"
Contextual Info: ZL30119 SONET/SDH Low Jitter Line Card Synchronizer Data Sheet December 2005 A full Design Manual is available to qualified customers. To register, please send an email to TimingandSync@Zarlink.com. Ordering Information ZL30119GGG 100 Pin CABGA Trays ZL30119GGG2 100 Pin CABGA*

F 9322

Abstract: DP8459 floppy disk magnetic read write head assembly IC 566 vco national semiconductor logic 566 vco kpc 817 DP8459TP-10 DP8459V-10 DP8459V-25
Contextual Info: DP8459 All-Code Data Synchronizer General Description The DP8459 Data Synchronizer is an integrated phase locked loop circuit which has been designed for application in magnetic hard disk, flexible floppy disk, optical disk, and tape drive memory systems for data re-synchronization and

ADT2T-1T-1P

Abstract: AD9739 AD9739BBCZ docsis 9508g ADCLK914 593 ph 9425 ADT2T INTEL Core i7 860 AVDD33
Contextual Info: 14-Bit, 2500 MSPS, RF Digital-to-Analog Converter AD9739 FUNCTIONAL BLOCK DIAGRAM RESET SYNC_IN_P SYNC_IN_N DB0[13:0]P DB0[13:0]N DB1[13:0]P DB1[13:0]N LVDS DRIVER CLOCK DISTRIBUTION SYNCHRONIZER DCI_P DCI_N LVDS DRIVER SYNC_OUT_P SYNC_OUT_N LVDS RECEIVER

FEC 0642 RoHS

Abstract: AD9584 lfcsp_VQ package 0E-18 06d6 06AC
Contextual Info: Quad/Octal Input Network Clock Generator/Synchronizer AD9548 FEATURES APPLICATIONS Supports Stratum 2 stability in holdover mode Supports reference switchover with phase build-out Supports hitless reference switchover Auto/manual holdover and reference switchover