SY100S325JCTR Search Results

F100K

Abstract: SY100S325 SY100S325FC SY100S325FCTR SY100S325JC
Contextual Info: LOW-POWER HEX ECL-to-TTL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Max. propagation delay of 3.7ns IEE min. of –37mA TTL outputs Extended supply voltage option: VEE = –4.2V to –5.5V 25% faster than National's 325

Contextual Info: ^ i.OW-POWER HEX EC!.-lo-TTL TRANSLATOR S YN ER G Y :viooS325 S E M IC O N D U C T O R D ES C R IPTIO N FE A TU R E S • Max. propagation delay of 3.7ns ■ Iee min. of -37m A ■ TTL outputs ■ Extended supply voltage option: Vee = -4.2V to -5.5V ■ 25% faster than National's 325

F100K

Abstract: SY100S325 SY100S325FC SY100S325JC SY100S325JCTR
Contextual Info: LOW-POWER HEX ECL-to-TTL TRANSLATOR SY100S325 DESCRIPTION FEATURES • Max. propagation delay of 3.7ns ■ IEE min. of –37mA ■ TTL outputs ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ 25% faster than National's 325 ■ Differential inputs with built-in offset

LD523

Contextual Info: LO W -PO W ER HEX ECL-to-TTL TRANSLATOR SYNERG Y SY100S325 SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 3.7ns Ie e min. o f-37 m A TTL outputs Extended supply voltage option: V ee = -4.2V to -5.5V 25% faster than National's 325 Differential inputs with built-in offset

Contextual Info: LOW -PO W ER HEX ECL-to-TTL TRANSLATOR SYNERGY SY100S325 SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 3.7ns T h e S Y 1 0 0 S 3 2 5 a re h e x tra n s la to rs fo r c o n v e rtin g 1 0 0 K E C L lo g ic le v e ls to T T L lo g ic le v e ls . In p u ts ca n be

Contextual Info: V LOW-POWER HEX ECL-to-TTL TRANSLATOR SYNERGY SY100S325 SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 3.7ns Ie e The SY100S325 are hex translators for converting 100K ECL logic levels to TTL logic levels. Inputs can be used as inverting, non-inverting or differential receivers.

Contextual Info: * LOW-POWER HEX ECL-to-TTL TRANSLATOR SYNERGY SY100S325 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 3.7ns The SY100S325 are hex translators for converting 100K ECL logic levels to TTL logic levels. Inputs can be used as inverting, non-inverting or differential receivers.

F100K

Abstract: SY100S325 SY100S325DC SY100S325FC D2618
Contextual Info: * LOW-POWER HEX ECL-to-TTL TRANSLATOR SYNERGY SY100S325 S E M IC O N D U C TO R FEATURES DESCRIPTION I Max. propagation delay of 3.7ns I Iee min. of -37m A The S Y 100S 325 are hex tran sla to rs fo r converting 100K ECL logic levels to TTL logic levels. Inputs can be

Contextual Info: LOW-POWER HEX ECL-to-TTL TRANSLATOR SYNERG Y SY100S325 SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 3.7ns Iee min. o f-37 m A TTL outputs Extended supply voltage option: V ee = -4 .2 V to -5 .5 V 25% faster than National's 325 Differential inputs with built-in offset

16D14

Contextual Info: LOW-POWER HEX ECL-to-TTL TRANSLATOR SY100S325 FINAL DESCRIPTION FEATURES • Max. propagation delay of 3.7ns ■ IEE min. of –37mA ■ TTL outputs ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ 25% faster than National's 325 ■ Differential inputs with built-in offset

F100K

Abstract: SY100S325 SY100S325JC SY100S325JCTR
Contextual Info: LOW-POWER HEX ECL-to-TTL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • Max. propagation delay of 3.7ns ■ IEE min. of –37mA ■ TTL outputs ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ 25% faster than National's 325 ■ Differential inputs with built-in offset

D2418

Abstract: F100K SY100S325 SY100S325DC SY100S325FC SY100S325JC SY100S325JCTR
Contextual Info: SYNERGY LOW-POWER HEX ECL-to-TTL TRANSLATOR SEMICONDUCTOR SYNERGY SY100S325 SY100S325 SEMICONDUCTOR DESCRIPTION FEATURES • Max. propagation delay of 3.7ns The SY100S325 are hex translators for converting 100K ECL logic levels to TTL logic levels. Inputs can be