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    SY100S313JCTR Search Results

    SY100S313JCTR Datasheets (3)

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    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    SY100S313JCTR
    Micrel Semiconductor QUAD DRIVER Original PDF 98.37KB 5
    SY100S313JC-TR
    Microchip Technology Integrated Circuits (ICs) - Logic - Buffers, Drivers, Receivers, Transceivers - IC BUF NON-INVERT -5.5V 28PLCC Original PDF 81.12KB
    SY100S313JCTR
    Synergy Semiconductor QUAD DRIVER Scan PDF 76.55KB 3
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    SY100S313JCTR Price and Stock

    Micrel Inc

    Micrel Inc SY100S313JC-TR

    100S SERIES, QUAD 1-INPUT INV/NINV GATE, PQCC28
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components SY100S313JC-TR 3,000
    • 1 $9.00
    • 10 $9.00
    • 100 $9.00
    • 1000 $3.15
    • 10000 $3.15
    Buy Now

    SY100S313JCTR Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: SY100S313 Micrel, Inc. QUAD DRIVER FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION The SY100S313 offers four drivers with two OR and two NOR outputs, designed for use in high-performance ECL systems. The four drivers are controlled by a common Enable signal which is buffered to minimize input loading.


    Original
    sy100s313800ps950psf100k+324-pin28-pinm9999-032206 PDF

    Contextual Info: * Q UAD DRIVER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 800ps Enable to Output max. of 950ps Iee SY100S313 min. o f-60 m A Extended supply voltage option: V ee = -4.2V to -5.5V Voltage and temperature compensation for improved noise immunity


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    Abstract: SY100S313 SY100S313FC SY100S313JC SY100S313JCTR
    Contextual Info: QUAD DRIVER FEATURES O1b O2a O2b O1a PIN CONFIGURATIONS O2a Oa VEES 11 10 9 8 7 6 5 Da Db 12 13 14 15 16 17 18 VEE VEES E Dc BLOCK DIAGRAM Dd Top View PLCC J28-1 4 3 O2b O1b 2 1 VCCA VCC VCC 28 27 O1c 26 O2c O1b O2b O1c O2c O1c E Da VEE Db 24 23 22 21 20 19


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    j28-1f24-1sy100s31sy100s313fc+4sy100s313jcsy100s313jctrsy100s313f100k PDF

    Contextual Info: «S Y N E R G Y SEMICONDUCTOR Q U A D D R IV E R FEATURES SY100S313 DESCRIPTION The S Y 100S 313 offers fo u r drivers with tw o OR and two NOR outputs, designed for use in high-perform ance ECL system s. The fo u r drivers are controlled by a com m on Enable signal which is buffered to m inim ize input loading.


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    sy100s313800ps950psd0d21l7+5sy100s313dcd24-1sy100s313fcf24-1sy100s313jc PDF

    Contextual Info: * QUAD DRIVER SYNERGY SY100S313 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 800ps Enable to Output max. of 950ps Iee min. o f-60 m A Extended supply voltage option: V ee = -4.2V to -5.5V Voltage and temperature compensation for improved noise immunity


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    sy100s313800ps950ps75ki2 PDF

    Contextual Info: * QUAD DRIVER SYNERGY 1Ü 0 S 3 1 3 SE M IC O N D U C T O R FEATURES DESCRIPTION • Max. propagation delay of 800ps ■ Enable to Output max. of 950ps ■ I e e min. of -60m A ■ Extended supply voltage option: V ee = -4.2V to -5.5V ■ Voltage and temperature compensation for


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    800ps950pssy100s313sy100s313dc+5sy100s313fcsy100s313jcsy100s313jctrf24-1j28-1 PDF

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    Abstract: F100K SY100S313 SY100S313JC SY100S313JCTR
    Contextual Info: SY100S313 Micrel, Inc. QUAD DRIVER DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ The SY100S313 offers four drivers with two OR and two NOR outputs, designed for use in high-performance ECL systems. The four drivers are controlled by a common Enable signal which is buffered to minimize input loading.


    Original
    sy100s313800ps950psm9999-042307+4edc16f100ksy100s313jcsy100s313jctr PDF

    Contextual Info: * QUAD DRIVER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 800ps The SY100S313 offers four drivers with two OR and two NOR outputs, designed for use in high-perform ance ECL system s. The four drivers are controlled by a com mon Enable signal which is buffered to m inim ize input loading.


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    800pssy100s31375ki2950ps PDF

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    Abstract: SY100S313 SY100S313FC SY100S313JC SY100S313JCTR
    Contextual Info: SY100S313 FINAL QUAD DRIVER FEATURES O1b O2a O2b O1a PIN CONFIGURATIONS O2a Oa VEES 11 10 9 8 7 6 5 Da Db 12 13 14 15 16 17 18 VEE VEES E Dc BLOCK DIAGRAM Dd Top View PLCC J28-1 4 3 O2b O1b 2 1 VCCA VCC VCC 28 27 O1c 26 O2c O1c O2c O1c E Da VEE Db 24 23 22 21 20 19


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    sy100s313j28-1f24-10s313fc+4sy100s313jcsy100s313jctrf100ksy100s313fc PDF