SY100S301JCTR Search Results
SY100S301JCTR Datasheets (4)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| SY100S301JCTR | Micrel Semiconductor | IC OR/NOR GATE TRIPLE 5IN ECL 28LDCC | Original | 89.34KB | 5 | ||
| SY100S301JCTR | Micrel Semiconductor | TRIPLE 5-INPUT OR/NOR GATE | Original | 97.36KB | 5 | ||
| SY100S301JC-TR | Microchip Technology | Integrated Circuits (ICs) - Logic - Gates and Inverters - Multi-Function, Configurable - IC GATE OR/NOR TRPL 5-IN 28-PLCC | Original | 80.42KB | |||
| SY100S301JCTR | Synergy Semiconductor | TRIPLE 5-INPUT OR/NOR GATE | Scan | 70.21KB | 3 |
SY100S301JCTR Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
F100K
Abstract: SY100S301 SY100S301FC SY100S301JC SY100S301JCTR F100K ECL book
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Original |
sy100s301750psf100k24-pin+7 | |
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Contextual Info: * TRIPLE 5-INPUT OR/NOR GATE SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 750ps Iee SY100S301 min. o f-25 m A Industry standard 100K ECL levels T h e S Y 1 0 0 S 3 0 1 is an u ltra -fa s t triple 5 -in p u t O R /N O R g a te d e s ig n e d for use in h ig h -p e rfo rm a n c e E C L system s. |
OCR Scan |
750pssy100s301 | |
fairchild ECL datasheet
Abstract: diode d4c F100K SY100S301 SY100S301FC SY100S301JC SY100S301JCTR F100K ECL book
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Original |
sy100s301750psj28-1f24-1+8 | |
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Contextual Info: * TRIPLE 5-INPUT OR/NOR GATE SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 750ps Iee SY100S301 min. o f-2 5 m A Industry standard 100K ECL levels The S Y 100S 301 is an ultra-fast triple 5-input O R /N O R gate designed for use in high-perform ance ECL systems. |
OCR Scan |
750pssy100s301f100k24-pin+1 | |
|
Contextual Info: * TRIPLE 5-INPUT SYNERGY O R /N O R SY100S301 G A T r S EM IC O N D U C TO R DESCRIPTION FEATURES • Max. propagation delay of 750ps T h e S Y 1 0 0 S 3 0 1 is a n u ltra -fa s t trip le 5 -in p u t O R /N O R g a te d e s ig n e d fo r u se in h ig h -p e rfo rm a n c e E C L sy s te m s . |
OCR Scan |
sy100s301750psf100k24-pin+4 | |
MARKING d2b
Abstract: F100K SY100S301 SY100S301JC SY100S301JCTR
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Original |
sy100s301750psf100k28-pin+4 | |
|
Contextual Info: * TRIPLE 5-INPUT OR/NOR GATE SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 750ps Ie e SY100S301 T h e S Y 100S 301 is an u ltra -fa s t trip le 5 -in p u t O R /N O R g a te d e s ig n e d fo r use in h ig h -p e rfo rm a n c e EC L sy s te m s . |
OCR Scan |
750pssy100s301f100k | |
d2b 1
Abstract: marking F24
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Original |
sy100s301750psf100k24-pin+4 | |
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Contextual Info: * TRIPLE 5-INPUT o r /n o r g a te SYNERGY SEMICONDUCTOR FEATURES „m nw ni SY100S301 DESCRIPTION M ax. p ro p a g a tio n d e la y o f 7 5 0p s The SY100S301 is an u ltra-fast triple 5-input O R/NO R gate designed fo r use in high-perform ance ECL system s. |
OCR Scan |
sy100s301t0013000b155sy100s301dc+4 | |
F100K
Abstract: SY100S301 SY100S301FC
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OCR Scan |
sy100s301750ps-25maf100k+3 |