SY100E143JCTR Search Results
SY100E143JCTR Datasheets (3)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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SY100E143JCTR | Micrel Semiconductor | 9 Bit Hold Register | Original | 64.74KB | 4 | ||
SY100E143JCTR | Micrel Semiconductor | 9-BIT HOLD REGISTER | Original | 72.38KB | 4 | ||
SY100E143JCTR | Synergy Semiconductor | 9-BIT HOLD REGISTER | Scan | 71.66KB | 3 |
SY100E143JCTR Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: SY10E143 SY100E143 FINAL 9-BIT HOLD REGISTER DESCRIPTION FEATURES • ■ ■ ■ ■ ■ The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine |
Original |
SY10E143 SY100E143 SY10/100E143 SY10E143JCTR J28-1 SY100E143JC SY100E143JCTR | |
E143
Abstract: SY100E143 SY10E143 SY10E143JC
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Original |
SY10E143 SY100E143 SY10/100E143 M9999-032006 E143 SY100E143 SY10E143 SY10E143JC | |
Contextual Info: * SY N E R G Y '‘-Br HUl.D HbGISI t H 'MOOF113 S E M IC O N D U C T O R FEATURES DESCRIPTION • 700MHz min. operating frequency ■ Extended 100E V ee range of -4.2V to -5.5V ■ 9 bits wide for byte-parity applications ■ Asynchronous Master Reset ■ Dual clocks |
OCR Scan |
700MHz MC10E/100E143 28-pin 10/100E SY10E143JC SY10E143JCTR SY100E143JC SY100E143JCTR J28-1 | |
TD013
Abstract: E143 SY100E143 SY10E143 SY10E143JC
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OCR Scan |
SY10E143 SY100E143 700MHz MC10E/100E143 SY10/100E143 SY10E143JC J28-1 SY10E143JCTR SY100E143JC TD013 E143 SY100E143 | |
E143
Abstract: SY100E143 SY10E143 SY10E143JC
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Original |
SY10E143 SY100E143 SY10/100E143 SY10E143JCTR J28-1 SY100E143JC SY100E143JCTR E143 SY100E143 SY10E143 SY10E143JC | |
Contextual Info: * 9-BIT HOLD REGISTER SYNERGY SY10E143 SY100E143 SEMICONDUCTOR DESCRIPTION FEATURES • 700MHz min. operating frequency ■ Extended 100E VEE range of -4.2V to -5.5V ■ 9 bits wide for byte-parity applications ■ Asynchronous Master Reset ■ Dual clocks |
OCR Scan |
SY10E143 SY100E143 700MHz MC10E/100E143 SY10/100E143 SY10E143JC J28-1 SY10E143JCTR SY100E143JC | |
Contextual Info: * SY10E143 SY100E143 9-BIT HOLD REGISTER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 700MHz min. operating frequency Extended 100E Vee range of -4.2V to -5.5V 9 bits wide for byte-parity applications Asynchronous Master Reset Dual clocks Fully compatible with industry standard 10KH, |
OCR Scan |
SY10E143 SY100E143 700MHz MC10E/100E143 28-pin SY10/100E143 | |
Contextual Info: * SY10E143 SY100E143 9-BIT HOLD REGISTER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 700MHz min. operating frequency Extended 100E V ee range of -4.2V to -5.5V 9 bits wide for byte-parity applications Asynchronous Master Reset Dual clocks Fully compatible with industry standard 10KH, |
OCR Scan |
SY10E143 SY100E143 700MHz MC10E/100E143 28-pin SY10/100E143 | |
Contextual Info: * SY10E143 SY100E143 9-BIT HOLD REGISTER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 700MHz min. operating frequency Extended 100E V ee range of -4.2V to -5.5V 9 bits wide for byte-parity applications Asynchronous Master Reset Dual clocks Fully compatible with industry standard 10KH, |
OCR Scan |
SY10E143 SY100E143 700MHz MC10E/100E143 28-pin 10/100E143 |