SY100E143JCTR Search Results

Contextual Info: SY10E143 SY100E143 FINAL 9-BIT HOLD REGISTER DESCRIPTION FEATURES • ■ ■ ■ ■ ■ The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine

E143

Abstract: SY100E143 SY10E143 SY10E143JC
Contextual Info: SY10E143 SY100E143 9-BIT HOLD REGISTER Micrel, Inc. SY10E143 SY100E143 DESCRIPTION FEATURES • ■ ■ ■ ■ ■ The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine

Contextual Info: * SY N E R G Y '‘-Br HUl.D HbGISI t H 'MOOF113 S E M IC O N D U C T O R FEATURES DESCRIPTION • 700MHz min. operating frequency ■ Extended 100E V ee range of -4.2V to -5.5V ■ 9 bits wide for byte-parity applications ■ Asynchronous Master Reset ■ Dual clocks

TD013

Abstract: E143 SY100E143 SY10E143 SY10E143JC
Contextual Info: 9-BIT HOLD REGISTER SYNERGY SY10E143 SY100E143 S E M IC O N D U C T O R DESCRIPTION FEATURES • 700MHz min. operating frequency ■ Extended 100E VEE range of -4.2V to -5.5V ■ 9 bits wide for byte-parity applications ■ Asynchronous Master Reset ■ Dual clocks

E143

Abstract: SY100E143 SY10E143 SY10E143JC
Contextual Info: 9-BIT HOLD REGISTER SY10E143 SY100E143 DESCRIPTION FEATURES • ■ ■ ■ ■ ■ The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data.

Contextual Info: * 9-BIT HOLD REGISTER SYNERGY SY10E143 SY100E143 SEMICONDUCTOR DESCRIPTION FEATURES • 700MHz min. operating frequency ■ Extended 100E VEE range of -4.2V to -5.5V ■ 9 bits wide for byte-parity applications ■ Asynchronous Master Reset ■ Dual clocks

Contextual Info: * SY10E143 SY100E143 9-BIT HOLD REGISTER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 700MHz min. operating frequency Extended 100E Vee range of -4.2V to -5.5V 9 bits wide for byte-parity applications Asynchronous Master Reset Dual clocks Fully compatible with industry standard 10KH,

Contextual Info: * SY10E143 SY100E143 9-BIT HOLD REGISTER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 700MHz min. operating frequency Extended 100E V ee range of -4.2V to -5.5V 9 bits wide for byte-parity applications Asynchronous Master Reset Dual clocks Fully compatible with industry standard 10KH,

Contextual Info: * SY10E143 SY100E143 9-BIT HOLD REGISTER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 700MHz min. operating frequency Extended 100E V ee range of -4.2V to -5.5V 9 bits wide for byte-parity applications Asynchronous Master Reset Dual clocks Fully compatible with industry standard 10KH,