STAT10 Search Results

AT697

Abstract: AT697F AT697E 4426D ASR16
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

SDRAM edac

Abstract: AT697 Radiation report AT697 AT697E AT697F SPARC T4-2 at697e-2h-e MQFP256
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 32 KB 4-way associative Instruction Cache – 16 KB 2-way associative Data Cache

CLR25

Abstract: GP power bank CLR19 C6000 TMS320C6000 SPRUF96 CLR29
Contextual Info: TMS320C6452 DSP General-Purpose Input/Output GPIO User's Guide Literature Number: SPRUF95 October 2007 2 SPRUF95 – October 2007 Submit Documentation Feedback Contents Preface . 5

tag 87

Abstract: ATF697FF EB 203 D AT697 ATF280F AT697F PCI analogic device power 23MFLOPS ATF697FF-ZA-E 0x8000004C
Contextual Info: ATF697FF Rad- hard 32 bit SPARC V8 Reconfigurable Processor DATASHEET Features • SPARC V8 High Performance Low-power 32-bit processor core • AT697F Sparc v8 processor • LEON2-FT 1.0.9.16.1 compliant • 8 Register Windows • Advanced Architecture 5 Stage Pipeline

RY 227

Abstract: ROUND ROBIN ARBITRATION AND FIXED PRIORITY "RY 227" at697f AT697F-KG-E 0722402VYC 5962-0722402vyc AT697 AT697F-2H-E ATC18RHA
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache – 32 kbyte Multi-sets Instruction Cache

S6010

Abstract: Waferscale Integration pac1000 PAC1000 WSI MagicPro II Programmer M/WSI MagicPro II Programmer
Contextual Info: PAC1000 TM WAFERSCALE INTEGRATION, INC. PRELIMINARY HIGH-PERFORMANCE PROGRAMMABLE STANDALONE MICROCONTROLLER PAC KEY FEATURES • High Level Development Tools • High-Performance — System Entry Language (PACSEL™) — Functional Simulator (PACSIM™)

at697f

Abstract: QFP256 DIMENSION ISEL04 xor ttl 74 AT697F-KG-E 0X6C000000 QFP256 Package
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache – 32 kbyte Multi-sets Instruction Cache

CLR35

Abstract: SPRUE25 SET70 CLR25 CLR50 GPIO SET59 CLR52 CLr67 IN60 diode
Contextual Info: TMS320DM644x DMSoC General-Purpose Input/Output GPIO User's Guide Literature Number: SPRUE25 December 2005 2 SPRUE25 – December 2005 Contents Preface . 6

tsc701

Abstract: sparclet pia7 sensor AUI isolation barrier M65656 V110
Contextual Info: TSC701 Advanced Communication Controller User’s Manual - 1996 TSC701 This design guide provides no information regarding delivery conditions and availability. Informations contained in specification charts are meant for product description but not as assured characteristics in the legal sense.

Contextual Info: Programmable Peripheral PAC1000 User-Configurable Embedded Controller Preliminary Features □ High-Performance User-Configurable Embedded Controller - 16 MHz Instruction Execution, Output □ Port, and Address Bus - 1008 x 64-Bit EPROM for PQFP □ Single-Cycle Control Architecture

Contextual Info: Chapter 1 Introduction In a very short period of tim e the PCI bus standard has moved beyond the PC to become the most w idely accepted high-perform ance bus standard for embedded applications. As a leader in providing chipset solutions for high-end embedded applications, V3 Sem iconductor

diode in40 gp

Abstract: CLR25 GP392 ARM926 ARM926EJ-S C6000 TMS320C6000 0R015
Contextual Info: TMS320DM646x DMSoC General-Purpose Input/Output GPIO User's Guide Literature Number: SPRUEQ8 December 2007 2 SPRUEQ8 – December 2007 Submit Documentation Feedback Contents Preface . 6

AT697

Abstract: 4226G AT697F D3/220 DC Kit AT697E MQFP-256 atmel edac D10136
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

ATF697FF

Contextual Info: ATF697FF Rad-Hard 32 bit SPARC V8 Reconfigurable Processor DATASHEET Features • SPARC V8 High Performance Low-power 32-bit processor core  AT697F Sparc v8 processor  LEON2-FT 1.0.9.16.1 compliant  8 Register Windows  Advanced Architecture  5 Stage Pipeline

AT697

Abstract: SPARC T4-2 AT697E PCIDMA AT697F AT697F PCI 86MIPS SDRAM edac
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

ATF280

Contextual Info: ATF697FF Rad- hard 32 bit SPARC V8 Reconfigurable Processor DATASHEET Features • SPARC V8 High Performance Low-power 32-bit processor core • AT697F Sparc v8 processor • LEON2-FT 1.0.9.16.1 compliant • 8 Register Windows • Advanced Architecture 5 Stage Pipeline

AT697

Abstract: AT697E 86MIPS ASR-24
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache