SN74LV166A Search Results

A115-A

Abstract: C101 SN54LV166A SN74LV166A 74lv166
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

A115-A

Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

A115-A

Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

A115-A

Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456A – FEBRUARY 2001 – REVISED JULY 2003 D D D D D D D D D 2-V to 5.5-V VCC Operation Max tpd of 10.5 ns at 5 V Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C

A115-A

Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

A115-A

Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

SN74LV166A

Abstract: A115-A C101 SN54LV166A
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

PLL WITH VCO 4046 appli note philips

Abstract: CD74HC4050 marking microstar ms 4011 CI 40106 8952 microcontroller ic 4017 decade counter datasheet ic HC 4066 AG GK 7002 7 SEGMENT DISPLAY LT 543 PIN CONFIGURATION LA 4508 as af power amplifier
Contextual Info: LOGIC OVERVIEW 1 PRODUCT INDEX 2 FUNCTIONAL CROSS−REFERENCE 3 DEVICE SELECTION GUIDE 4 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,

74LS series logic gates 3 input or gate

Abstract: sn74 series TTL logic gates list 4017 counter IC datasheet data sheet ic 4017 IC CD 4033 pin configuration CMOS Data Book Texas Instruments Incorporated 74LS series logic gates hp 4514 TEXAS INSTRUMENTS SN7400 SERIES ic 4026 down counter
Contextual Info: LOGIC OVERVIEW 1 FOCUS ON THE IDEAL LITTLE LOGIC SOLUTION 2 FUNCTIONAL INDEX 3 FUNCTIONAL CROSSĆREFERENCE 4 DEVICE SELECTION GUIDE 5 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2002 IMPORTANT NOTICE