A115-A
Abstract: C101 SN54LV166A SN74LV166A 74lv166
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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sn54lv166asn74lv166ascls456b000-v+4a114-aa115-ac10174lv166
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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sn54lv166asn74lv166ascls456b000-v+3a114-aa115-ac101
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PDF
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Contextual Info: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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sn54lv166asn74lv166ascls456b000-v+3a114-aa115-ac101
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PDF
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